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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3767-drm-amdgpu-Add-amdgpu_ras_eeprom_reset_table.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3767-drm-amdgpu-Add-amdgpu_ras_eeprom_reset_table.patch73
1 files changed, 73 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3767-drm-amdgpu-Add-amdgpu_ras_eeprom_reset_table.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3767-drm-amdgpu-Add-amdgpu_ras_eeprom_reset_table.patch
new file mode 100644
index 00000000..ea6e1cd0
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3767-drm-amdgpu-Add-amdgpu_ras_eeprom_reset_table.patch
@@ -0,0 +1,73 @@
+From 00f45d13fe2c5551d7e1cc74eaada5146e62ee37 Mon Sep 17 00:00:00 2001
+From: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
+Date: Mon, 9 Sep 2019 15:59:45 -0400
+Subject: [PATCH 3767/4256] drm/amdgpu: Add amdgpu_ras_eeprom_reset_table
+
+This will allow to reset the table on the fly.
+
+Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
+Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
+Reviewed-by: Guchun Chen <guchun.chen@amd.com>
+---
+ .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 25 +++++++++++++------
+ .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h | 1 +
+ 2 files changed, 18 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+index 43dd4ab9b6d5..11a8445cf734 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+@@ -102,6 +102,22 @@ static int __update_table_header(struct amdgpu_ras_eeprom_control *control,
+
+ static uint32_t __calc_hdr_byte_sum(struct amdgpu_ras_eeprom_control *control);
+
++int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control)
++{
++ unsigned char buff[EEPROM_ADDRESS_SIZE + EEPROM_TABLE_HEADER_SIZE] = { 0 };
++ struct amdgpu_device *adev = to_amdgpu_device(control);
++ struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;
++
++ hdr->header = EEPROM_TABLE_HDR_VAL;
++ hdr->version = EEPROM_TABLE_VER;
++ hdr->first_rec_offset = EEPROM_RECORD_START;
++ hdr->tbl_size = EEPROM_TABLE_HEADER_SIZE;
++
++ adev->psp.ras.ras->eeprom_control.tbl_byte_sum =
++ __calc_hdr_byte_sum(&adev->psp.ras.ras->eeprom_control);
++ return __update_table_header(control, buff);
++}
++
+ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control)
+ {
+ int ret = 0;
+@@ -149,14 +165,7 @@ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control)
+ } else {
+ DRM_INFO("Creating new EEPROM table");
+
+- hdr->header = EEPROM_TABLE_HDR_VAL;
+- hdr->version = EEPROM_TABLE_VER;
+- hdr->first_rec_offset = EEPROM_RECORD_START;
+- hdr->tbl_size = EEPROM_TABLE_HEADER_SIZE;
+-
+- adev->psp.ras.ras->eeprom_control.tbl_byte_sum =
+- __calc_hdr_byte_sum(&adev->psp.ras.ras->eeprom_control);
+- ret = __update_table_header(control, buff);
++ ret = amdgpu_ras_eeprom_reset_table(control);
+ }
+
+ /* Start inserting records from here */
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
+index 41f3fcb9a29b..622269957c1b 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
+@@ -79,6 +79,7 @@ struct eeprom_table_record {
+
+ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control);
+ void amdgpu_ras_eeprom_fini(struct amdgpu_ras_eeprom_control *control);
++int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control);
+
+ int amdgpu_ras_eeprom_process_recods(struct amdgpu_ras_eeprom_control *control,
+ struct eeprom_table_record *records,
+--
+2.17.1
+