diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3766-drm-amdgpu-rename-umc-ras_init-to-err_cnt_init.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3766-drm-amdgpu-rename-umc-ras_init-to-err_cnt_init.patch | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3766-drm-amdgpu-rename-umc-ras_init-to-err_cnt_init.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3766-drm-amdgpu-rename-umc-ras_init-to-err_cnt_init.patch new file mode 100644 index 00000000..387a8363 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3766-drm-amdgpu-rename-umc-ras_init-to-err_cnt_init.patch @@ -0,0 +1,79 @@ +From 6cc768df49a4153e6cc3563467163a0ad17f255e Mon Sep 17 00:00:00 2001 +From: Tao Zhou <tao.zhou1@amd.com> +Date: Fri, 6 Sep 2019 14:32:14 +0800 +Subject: [PATCH 3766/4256] drm/amdgpu: rename umc ras_init to err_cnt_init + +this interface is related to specific version of umc, distinguish it +from ras_late_init + +Signed-off-by: Tao Zhou <tao.zhou1@amd.com> +Reviewed-by: Guchun Chen <guchun.chen@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 2 +- + drivers/gpu/drm/amd/amdgpu/umc_v6_1.c | 8 ++++---- + 3 files changed, 7 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c +index 5683c51710aa..c5d8b08af731 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c +@@ -63,8 +63,8 @@ int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_ih_info) + } + + /* ras init of specific umc version */ +- if (adev->umc.funcs && adev->umc.funcs->ras_init) +- adev->umc.funcs->ras_init(adev); ++ if (adev->umc.funcs && adev->umc.funcs->err_cnt_init) ++ adev->umc.funcs->err_cnt_init(adev); + + return 0; + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h +index 6f22c9704555..3ec36d9e012a 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h +@@ -54,7 +54,7 @@ + adev->umc.funcs->disable_umc_index_mode(adev); + + struct amdgpu_umc_funcs { +- void (*ras_init)(struct amdgpu_device *adev); ++ void (*err_cnt_init)(struct amdgpu_device *adev); + int (*ras_late_init)(struct amdgpu_device *adev, void *ras_ih_info); + void (*query_ras_error_count)(struct amdgpu_device *adev, + void *ras_error_status); +diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c +index 4cdb5c04cd17..1c0da32c1561 100644 +--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c ++++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c +@@ -234,7 +234,7 @@ static void umc_v6_1_query_ras_error_address(struct amdgpu_device *adev, + amdgpu_umc_for_each_channel(umc_v6_1_query_error_address); + } + +-static void umc_v6_1_ras_init_per_channel(struct amdgpu_device *adev, ++static void umc_v6_1_err_cnt_init_per_channel(struct amdgpu_device *adev, + struct ras_err_data *err_data, + uint32_t umc_reg_offset, uint32_t channel_index) + { +@@ -264,15 +264,15 @@ static void umc_v6_1_ras_init_per_channel(struct amdgpu_device *adev, + WREG32(ecc_err_cnt_addr + umc_reg_offset, UMC_V6_1_CE_CNT_INIT); + } + +-static void umc_v6_1_ras_init(struct amdgpu_device *adev) ++static void umc_v6_1_err_cnt_init(struct amdgpu_device *adev) + { + void *ras_error_status = NULL; + +- amdgpu_umc_for_each_channel(umc_v6_1_ras_init_per_channel); ++ amdgpu_umc_for_each_channel(umc_v6_1_err_cnt_init_per_channel); + } + + const struct amdgpu_umc_funcs umc_v6_1_funcs = { +- .ras_init = umc_v6_1_ras_init, ++ .err_cnt_init = umc_v6_1_err_cnt_init, + .ras_late_init = amdgpu_umc_ras_late_init, + .query_ras_error_count = umc_v6_1_query_ras_error_count, + .query_ras_error_address = umc_v6_1_query_ras_error_address, +-- +2.17.1 + |