diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3742-drm-amdgpu-gfx-switch-to-amdgpu_gfx_ras_late_init-he.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3742-drm-amdgpu-gfx-switch-to-amdgpu_gfx_ras_late_init-he.patch | 155 |
1 files changed, 155 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3742-drm-amdgpu-gfx-switch-to-amdgpu_gfx_ras_late_init-he.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3742-drm-amdgpu-gfx-switch-to-amdgpu_gfx_ras_late_init-he.patch new file mode 100644 index 00000000..d4160a88 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3742-drm-amdgpu-gfx-switch-to-amdgpu_gfx_ras_late_init-he.patch @@ -0,0 +1,155 @@ +From fd3d679b6c1d5b791fdd5f3d349ffb8ff1c5b11b Mon Sep 17 00:00:00 2001 +From: Hawking Zhang <Hawking.Zhang@amd.com> +Date: Tue, 3 Sep 2019 06:06:08 +0800 +Subject: [PATCH 3742/4256] drm/amdgpu/gfx: switch to amdgpu_gfx_ras_late_init + helper function + +amdgpu_gfx_ras_late_init is used to init gfx specfic +ras debugfs/sysfs node and gfx specific interrupt handler. +It can be shared among gfx generations + +Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> +Reviewed-by: Tao Zhou <tao.zhou1@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 49 +++++++++++++++++++++++++ + drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 3 +- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 37 ++----------------- + 3 files changed, 54 insertions(+), 35 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +index e1fdcb44a7dd..508d521a0e59 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +@@ -26,6 +26,7 @@ + #include "amdgpu.h" + #include "amdgpu_gfx.h" + #include "amdgpu_rlc.h" ++#include "amdgpu_ras.h" + + /* delay 0.1 second to enable gfx off feature */ + #define GFX_OFF_DELAY_ENABLE msecs_to_jiffies(100) +@@ -569,3 +570,51 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable) + + mutex_unlock(&adev->gfx.gfx_off_mutex); + } ++ ++int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, ++ void *ras_ih_info) ++{ ++ int r; ++ struct ras_ih_if *ih_info = (struct ras_ih_if *)ras_ih_info; ++ struct ras_fs_if fs_info = { ++ .sysfs_name = "gfx_err_count", ++ .debugfs_name = "gfx_err_inject", ++ }; ++ ++ if (!ih_info) ++ return -EINVAL; ++ ++ if (!adev->gfx.ras_if) { ++ adev->gfx.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL); ++ if (!adev->gfx.ras_if) ++ return -ENOMEM; ++ adev->gfx.ras_if->block = AMDGPU_RAS_BLOCK__GFX; ++ adev->gfx.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; ++ adev->gfx.ras_if->sub_block_index = 0; ++ strcpy(adev->gfx.ras_if->name, "gfx"); ++ } ++ fs_info.head = ih_info->head = *adev->gfx.ras_if; ++ ++ r = amdgpu_ras_late_init(adev, adev->gfx.ras_if, ++ &fs_info, ih_info); ++ if (r) ++ goto free; ++ ++ if (amdgpu_ras_is_supported(adev, adev->gfx.ras_if->block)) { ++ r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); ++ if (r) ++ goto late_fini; ++ } else { ++ /* free gfx ras_if if ras is not supported */ ++ r = 0; ++ goto free; ++ } ++ ++ return 0; ++late_fini: ++ amdgpu_ras_late_fini(adev, adev->gfx.ras_if, ih_info); ++free: ++ kfree(adev->gfx.ras_if); ++ adev->gfx.ras_if = NULL; ++ return r; ++} +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +index 554a59b3c4a6..6ed0560d7299 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +@@ -383,5 +383,6 @@ void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit, + bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me, + int pipe, int queue); + void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable); +- ++int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, ++ void *ras_ih_info); + #endif +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 18272761af53..3ad97ca9efc5 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -4407,22 +4407,11 @@ static int gfx_v9_0_ecc_late_init(void *handle) + struct ras_ih_if ih_info = { + .cb = gfx_v9_0_process_ras_data_cb, + }; +- struct ras_fs_if fs_info = { +- .sysfs_name = "gfx_err_count", +- .debugfs_name = "gfx_err_inject", +- }; + int r; + +- if (!adev->gfx.ras_if) { +- adev->gfx.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL); +- if (!adev->gfx.ras_if) +- return -ENOMEM; +- adev->gfx.ras_if->block = AMDGPU_RAS_BLOCK__GFX; +- adev->gfx.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; +- adev->gfx.ras_if->sub_block_index = 0; +- strcpy(adev->gfx.ras_if->name, "gfx"); +- } +- fs_info.head = ih_info.head = *adev->gfx.ras_if; ++ r = amdgpu_gfx_ras_late_init(adev, &ih_info); ++ if (r) ++ return r; + + r = gfx_v9_0_do_edc_gds_workarounds(adev); + if (r) +@@ -4433,27 +4422,7 @@ static int gfx_v9_0_ecc_late_init(void *handle) + if (r) + return r; + +- r = amdgpu_ras_late_init(adev, adev->gfx.ras_if, +- &fs_info, &ih_info); +- if (r) +- goto free; +- +- if (amdgpu_ras_is_supported(adev, adev->gfx.ras_if->block)) { +- r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); +- if (r) +- goto late_fini; +- } else { +- r = 0; +- goto free; +- } +- + return 0; +-late_fini: +- amdgpu_ras_late_fini(adev, adev->gfx.ras_if, &ih_info); +-free: +- kfree(adev->gfx.ras_if); +- adev->gfx.ras_if = NULL; +- return r; + } + + static int gfx_v9_0_late_init(void *handle) +-- +2.17.1 + |