diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3690-drm-amdgpu-add-ras_late_init-callback-function-for-n.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3690-drm-amdgpu-add-ras_late_init-callback-function-for-n.patch | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3690-drm-amdgpu-add-ras_late_init-callback-function-for-n.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3690-drm-amdgpu-add-ras_late_init-callback-function-for-n.patch new file mode 100644 index 00000000..b6a13f43 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3690-drm-amdgpu-add-ras_late_init-callback-function-for-n.patch @@ -0,0 +1,111 @@ +From c265c0567b4c7886912c7d94c93fb4b636cdab83 Mon Sep 17 00:00:00 2001 +From: Hawking Zhang <Hawking.Zhang@amd.com> +Date: Thu, 29 Aug 2019 20:57:32 +0800 +Subject: [PATCH 3690/4256] drm/amdgpu: add ras_late_init callback function for + nbio v7_4 (v3) + +ras_late_init callback function will be used to do common ras +init in late init phase. + +v2: call ras_late_fini to do cleanup when fails to enable interrupt + +v3: rename sysfs/debugfs node name to pcie_bif_xxx + +Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Tao Zhou <tao.zhou1@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h | 2 ++ + drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 45 ++++++++++++++++++++++++ + 2 files changed, 47 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h +index a04c5ea03418..51078da6188f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h +@@ -81,12 +81,14 @@ struct amdgpu_nbio_funcs { + void (*handle_ras_err_event_athub_intr_no_bifring)(struct amdgpu_device *adev); + int (*init_ras_controller_interrupt)(struct amdgpu_device *adev); + int (*init_ras_err_event_athub_interrupt)(struct amdgpu_device *adev); ++ int (*ras_late_init)(struct amdgpu_device *adev); + }; + + struct amdgpu_nbio { + const struct nbio_hdp_flush_reg *hdp_flush_reg; + struct amdgpu_irq_src ras_controller_irq; + struct amdgpu_irq_src ras_err_event_athub_irq; ++ struct ras_common_if *ras_if; + const struct amdgpu_nbio_funcs *funcs; + }; + +diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c +index faf9300630a5..5e784bbd2d7f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c ++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c +@@ -23,6 +23,7 @@ + #include "amdgpu.h" + #include "amdgpu_atombios.h" + #include "nbio_v7_4.h" ++#include "amdgpu_ras.h" + + #include "nbio/nbio_7_4_offset.h" + #include "nbio/nbio_7_4_sh_mask.h" +@@ -468,6 +469,49 @@ static int nbio_v7_4_init_ras_err_event_athub_interrupt (struct amdgpu_device *a + return 0; + } + ++static int nbio_v7_4_ras_late_init(struct amdgpu_device *adev) ++{ ++ int r; ++ struct ras_ih_if ih_info = { ++ .cb = NULL, ++ }; ++ struct ras_fs_if fs_info = { ++ .sysfs_name = "pcie_bif_err_count", ++ .debugfs_name = "pcie_bif_err_inject", ++ }; ++ ++ if (!adev->nbio.ras_if) { ++ adev->nbio.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL); ++ if (!adev->nbio.ras_if) ++ return -ENOMEM; ++ adev->nbio.ras_if->block = AMDGPU_RAS_BLOCK__PCIE_BIF; ++ adev->nbio.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; ++ adev->nbio.ras_if->sub_block_index = 0; ++ strcpy(adev->nbio.ras_if->name, "pcie_bif"); ++ } ++ ih_info.head = fs_info.head = *adev->nbio.ras_if; ++ r = amdgpu_ras_late_init(adev, adev->nbio.ras_if, ++ &fs_info, &ih_info); ++ if (r) ++ goto free; ++ ++ if (amdgpu_ras_is_supported(adev, adev->nbio.ras_if->block)) { ++ r = amdgpu_irq_get(adev, &adev->nbio.ras_controller_irq, 0); ++ if (r) ++ goto late_fini; ++ r = amdgpu_irq_get(adev, &adev->nbio.ras_err_event_athub_irq, 0); ++ if (r) ++ goto late_fini; ++ } ++ ++ return 0; ++late_fini: ++ amdgpu_ras_late_fini(adev, adev->nbio.ras_if, &ih_info); ++free: ++ kfree(adev->nbio.ras_if); ++ return r; ++} ++ + const struct amdgpu_nbio_funcs nbio_v7_4_funcs = { + .get_hdp_flush_req_offset = nbio_v7_4_get_hdp_flush_req_offset, + .get_hdp_flush_done_offset = nbio_v7_4_get_hdp_flush_done_offset, +@@ -493,4 +537,5 @@ const struct amdgpu_nbio_funcs nbio_v7_4_funcs = { + .handle_ras_err_event_athub_intr_no_bifring = nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring, + .init_ras_controller_interrupt = nbio_v7_4_init_ras_controller_interrupt, + .init_ras_err_event_athub_interrupt = nbio_v7_4_init_ras_err_event_athub_interrupt, ++ .ras_late_init = nbio_v7_4_ras_late_init, + }; +-- +2.17.1 + |