diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3627-drm-amdgpu-psp-keep-TMR-in-visible-vram-region-for-S.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3627-drm-amdgpu-psp-keep-TMR-in-visible-vram-region-for-S.patch | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3627-drm-amdgpu-psp-keep-TMR-in-visible-vram-region-for-S.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3627-drm-amdgpu-psp-keep-TMR-in-visible-vram-region-for-S.patch new file mode 100644 index 00000000..5c6acdc5 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3627-drm-amdgpu-psp-keep-TMR-in-visible-vram-region-for-S.patch @@ -0,0 +1,65 @@ +From 48f67d4f5384e4106f79bb4939345e6a8f936fee Mon Sep 17 00:00:00 2001 +From: "Tianci.Yin" <tianci.yin@amd.com> +Date: Wed, 28 Aug 2019 10:03:40 +0800 +Subject: [PATCH 3627/4256] drm/amdgpu/psp: keep TMR in visible vram region for + SRIOV +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix compute ring test failure in sriov scenario. + +Change-Id: I141d3d094e2cba9bcf2f6c96f4d8c4ef43c421c3 +Reviewed-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Tianci.Yin <tianci.yin@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +index 2d5cf18f2241..d0d8f15e16f1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +@@ -242,6 +242,8 @@ static int psp_tmr_init(struct psp_context *psp) + { + int ret; + int tmr_size; ++ void *tmr_buf; ++ void **pptr; + + /* + * According to HW engineer, they prefer the TMR address be "naturally +@@ -264,9 +266,10 @@ static int psp_tmr_init(struct psp_context *psp) + } + } + ++ pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; + ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE, + AMDGPU_GEM_DOMAIN_VRAM, +- &psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf); ++ &psp->tmr_bo, &psp->tmr_mc_addr, pptr); + + return ret; + } +@@ -1153,6 +1156,8 @@ static int psp_hw_fini(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + struct psp_context *psp = &adev->psp; ++ void *tmr_buf; ++ void **pptr; + + if (adev->gmc.xgmi.num_physical_nodes > 1 && + psp->xgmi_context.initialized == 1) +@@ -1163,7 +1168,8 @@ static int psp_hw_fini(void *handle) + + psp_ring_destroy(psp, PSP_RING_TYPE__KM); + +- amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf); ++ pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; ++ amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr); + amdgpu_bo_free_kernel(&psp->fw_pri_bo, + &psp->fw_pri_mc_addr, &psp->fw_pri_buf); + amdgpu_bo_free_kernel(&psp->fence_buf_bo, +-- +2.17.1 + |