diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3575-drm-amd-display-Add-VM-page-fault-handle-implementat.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3575-drm-amd-display-Add-VM-page-fault-handle-implementat.patch | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3575-drm-amd-display-Add-VM-page-fault-handle-implementat.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3575-drm-amd-display-Add-VM-page-fault-handle-implementat.patch new file mode 100644 index 00000000..431dcf22 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3575-drm-amd-display-Add-VM-page-fault-handle-implementat.patch @@ -0,0 +1,128 @@ +From cfcafa39153dc47ec051920fb9940f1097418c86 Mon Sep 17 00:00:00 2001 +From: Jaehyun Chung <jaehyun.chung@amd.com> +Date: Mon, 29 Jul 2019 14:48:32 -0400 +Subject: [PATCH 3575/4256] drm/amd/display: Add VM page fault handle + implementation + +[How] Allocate memory for default page and program memory block addr +into default page addr register. + +Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> +Reviewed-by: Jun Lei <Jun.Lei@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dc.h | 1 + + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h | 6 +++++- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c | 5 +++++ + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h | 9 +++++++-- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 1 + + drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 2 ++ + 6 files changed, 21 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h +index 81b986acbae6..f95fb13f14de 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc.h ++++ b/drivers/gpu/drm/amd/display/dc/dc.h +@@ -426,6 +426,7 @@ struct dc_phy_addr_space_config { + } gart_config; + + bool valid; ++ uint64_t page_table_default_page_addr; + }; + + struct dc_virtual_addr_space_config { +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h +index 70e5d84fc69a..c8ae3023fda2 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h +@@ -119,6 +119,8 @@ struct dcn_hubbub_registers { + uint32_t DCN_VM_AGP_BOT; + uint32_t DCN_VM_AGP_TOP; + uint32_t DCN_VM_AGP_BASE; ++ uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB; ++ uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB; + }; + + /* set field name */ +@@ -196,7 +198,9 @@ struct dcn_hubbub_registers { + type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;\ + type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;\ + type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;\ +- type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D ++ type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;\ ++ type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB;\ ++ type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB + + #define HUBBUB_STUTTER_REG_FIELD_LIST(type) \ + type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A;\ +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c +index f13e039f8ef4..b83c022e2c6f 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c +@@ -380,6 +380,11 @@ int hubbub2_init_dchub_sys_ctx(struct hubbub *hubbub, + REG_SET(DCN_VM_AGP_BASE, 0, + AGP_BASE, pa_config->system_aperture.agp_base >> 24); + ++ REG_SET(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB, 0, ++ DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB, (pa_config->page_table_default_page_addr >> 44) & 0xF); ++ REG_SET(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB, 0, ++ DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB, (pa_config->page_table_default_page_addr >> 12) & 0xFFFFFFFF); ++ + if (pa_config->gart_config.page_table_start_addr != pa_config->gart_config.page_table_end_addr) { + phys_config.page_table_start_addr = pa_config->gart_config.page_table_start_addr >> 12; + phys_config.page_table_end_addr = pa_config->gart_config.page_table_end_addr >> 12; +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h +index caf7273ca240..0d0caa6de935 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h +@@ -45,7 +45,10 @@ + #define HUBBUB_REG_LIST_DCN20(id)\ + HUBBUB_REG_LIST_DCN20_COMMON(), \ + HUBBUB_SR_WATERMARK_REG_LIST(), \ +- HUBBUB_VM_REG_LIST() ++ HUBBUB_VM_REG_LIST(),\ ++ SR(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB),\ ++ SR(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB) ++ + + #define HUBBUB_MASK_SH_LIST_DCN20(mask_sh)\ + HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh), \ +@@ -56,7 +59,9 @@ + HUBBUB_SF(DCN_VM_FB_OFFSET, FB_OFFSET, mask_sh), \ + HUBBUB_SF(DCN_VM_AGP_BOT, AGP_BOT, mask_sh), \ + HUBBUB_SF(DCN_VM_AGP_TOP, AGP_TOP, mask_sh), \ +- HUBBUB_SF(DCN_VM_AGP_BASE, AGP_BASE, mask_sh) ++ HUBBUB_SF(DCN_VM_AGP_BASE, AGP_BASE, mask_sh), \ ++ HUBBUB_SF(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB, DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB, mask_sh), \ ++ HUBBUB_SF(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB, DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB, mask_sh) + + struct dcn20_hubbub { + struct hubbub base; +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +index 3bc75176bf2d..18de1aeaa51f 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +@@ -1504,6 +1504,7 @@ static int dcn20_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_ph + config.gart_config.page_table_start_addr = pa_config->gart_config.page_table_start_addr; + config.gart_config.page_table_end_addr = pa_config->gart_config.page_table_end_addr; + config.gart_config.page_table_base_addr = pa_config->gart_config.page_table_base_addr; ++ config.page_table_default_page_addr = pa_config->page_table_default_page_addr; + + return dc->res_pool->hubbub->funcs->init_dchub_sys_ctx(dc->res_pool->hubbub, &config); + } +diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h +index c1f29b1654d9..a6297219d7fc 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h +@@ -80,6 +80,8 @@ struct dcn_hubbub_phys_addr_config { + uint64_t page_table_end_addr; + uint64_t page_table_base_addr; + } gart_config; ++ ++ uint64_t page_table_default_page_addr; + }; + + struct dcn_hubbub_virt_addr_config { +-- +2.17.1 + |