aboutsummaryrefslogtreecommitdiffstats
path: root/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3567-drm-amd-display-fix-MPO-HUBP-underflow-with-Scatter-.patch
diff options
context:
space:
mode:
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3567-drm-amd-display-fix-MPO-HUBP-underflow-with-Scatter-.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3567-drm-amd-display-fix-MPO-HUBP-underflow-with-Scatter-.patch39
1 files changed, 39 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3567-drm-amd-display-fix-MPO-HUBP-underflow-with-Scatter-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3567-drm-amd-display-fix-MPO-HUBP-underflow-with-Scatter-.patch
new file mode 100644
index 00000000..c85f9d54
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3567-drm-amd-display-fix-MPO-HUBP-underflow-with-Scatter-.patch
@@ -0,0 +1,39 @@
+From 0136be1777af316f53129c830348541868b37e3f Mon Sep 17 00:00:00 2001
+From: Zi Yu Liao <ziyu.liao@amd.com>
+Date: Tue, 30 Jul 2019 15:36:53 -0400
+Subject: [PATCH 3567/4256] drm/amd/display: fix MPO HUBP underflow with
+ Scatter Gather
+
+[why]
+With Scatter Gather enabled, HUBP underflows during MPO enabled video
+playback. hubp_init has a register write that fixes this problem, but
+the register is cleared when HUBP gets power gated.
+
+[how]
+Make a call to hubp_init during enable_plane, so that the fix can
+be applied after HUBP powers back on again.
+
+Signed-off-by: Zi Yu Liao <ziyu.liao@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+index 56c4df262dc0..125c466ebffa 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+@@ -934,6 +934,9 @@ void dcn20_enable_plane(
+ /* enable DCFCLK current DCHUB */
+ pipe_ctx->plane_res.hubp->funcs->hubp_clk_cntl(pipe_ctx->plane_res.hubp, true);
+
++ /* initialize HUBP on power up */
++ pipe_ctx->plane_res.hubp->funcs->hubp_init(pipe_ctx->plane_res.hubp);
++
+ /* make sure OPP_PIPE_CLOCK_EN = 1 */
+ pipe_ctx->stream_res.opp->funcs->opp_pipe_clock_control(
+ pipe_ctx->stream_res.opp,
+--
+2.17.1
+