diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3544-drm-amd-powerplay-fix-message-of-SetHardMinByFreq-fa.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3544-drm-amd-powerplay-fix-message-of-SetHardMinByFreq-fa.patch | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3544-drm-amd-powerplay-fix-message-of-SetHardMinByFreq-fa.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3544-drm-amd-powerplay-fix-message-of-SetHardMinByFreq-fa.patch new file mode 100644 index 00000000..6e4c82d0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3544-drm-amd-powerplay-fix-message-of-SetHardMinByFreq-fa.patch @@ -0,0 +1,57 @@ +From 3d04de493f2365082964bb9f9701daef269e17fb Mon Sep 17 00:00:00 2001 +From: Kevin Wang <kevin1.wang@amd.com> +Date: Tue, 13 Aug 2019 10:25:25 +0800 +Subject: [PATCH 3544/4256] drm/amd/powerplay: fix message of SetHardMinByFreq + failed when feature is disabled +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +the direct send message to smc to set hard clokc will failed +when smc clock dpm feature is disabled. +so use function of smu_set_hard_freq_range to replace it. +the function will check feature enablement. + +eg: when uclk (mclk) dpm feature is disabled on navi10 +[ 300.675901] amdgpu: [powerplay] failed send message: SetHardMinByFreq(28) + param: 0x00020064 response 0xfffffffb + +Signed-off-by: Kevin Wang <kevin1.wang@amd.com> +Reviewed-by: Evan Quan <evan.quan@amd.com> +--- + drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 11 +---------- + 1 file changed, 1 insertion(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +index d3500a5ef720..46d905daab38 100644 +--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c ++++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +@@ -1282,7 +1282,6 @@ smu_v11_0_display_clock_voltage_request(struct smu_context *smu, + int ret = 0; + enum smu_clk_type clk_select = 0; + uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; +- int clk_id; + + if (!smu->pm_enabled) + return -EINVAL; +@@ -1317,16 +1316,8 @@ smu_v11_0_display_clock_voltage_request(struct smu_context *smu, + if (clk_select == SMU_UCLK && smu->disable_uclk_switch) + return 0; + +- clk_id = smu_clk_get_index(smu, clk_select); +- if (clk_id < 0) { +- ret = -EINVAL; +- goto failed; +- } +- +- + mutex_lock(&smu->mutex); +- ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetHardMinByFreq, +- (clk_id << 16) | clk_freq); ++ ret = smu_set_hard_freq_range(smu, clk_select, clk_freq, 0); + mutex_unlock(&smu->mutex); + + if(clk_select == SMU_UCLK) +-- +2.17.1 + |