diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3517-drm-amdgpu-add-set_gfx_cgpg-implement-v2.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3517-drm-amdgpu-add-set_gfx_cgpg-implement-v2.patch | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3517-drm-amdgpu-add-set_gfx_cgpg-implement-v2.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3517-drm-amdgpu-add-set_gfx_cgpg-implement-v2.patch new file mode 100644 index 00000000..57b80a6d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3517-drm-amdgpu-add-set_gfx_cgpg-implement-v2.patch @@ -0,0 +1,94 @@ +From b1f78d62b5eaea1166c89685ca8a4d36b3f6ab8f Mon Sep 17 00:00:00 2001 +From: Aaron Liu <aaron.liu@amd.com> +Date: Tue, 16 Jul 2019 17:21:17 +0800 +Subject: [PATCH 3517/4256] drm/amdgpu: add set_gfx_cgpg implement (v2) + +add set_gfx_cgpg implement + +v2: check if using sw_smu (Alex) + +Signed-off-by: Aaron Liu <aaron.liu@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Reviewed-by: Evan Quan <evan.quan@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 +++++ + drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 3 +++ + drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 10 ++++++++++ + 3 files changed, 18 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 2a43ec2f7bad..b3defa07b7c8 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -4561,6 +4561,9 @@ static void gfx_v9_0_update_gfx_cg_power_gating(struct amdgpu_device *adev, + { + amdgpu_gfx_rlc_enter_safe_mode(adev); + ++ if (is_support_sw_smu(adev) && !enable) ++ smu_set_gfx_cgpg(&adev->smu, enable); ++ + if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) && enable) { + gfx_v9_0_enable_gfx_cg_power_gating(adev, true); + if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PIPELINE) +@@ -4836,6 +4839,8 @@ static int gfx_v9_0_set_powergating_state(void *handle, + gfx_v9_0_enable_cp_power_gating(adev, false); + + /* update gfx cgpg state */ ++ if (is_support_sw_smu(adev) && enable) ++ smu_set_gfx_cgpg(&adev->smu, enable); + gfx_v9_0_update_gfx_cg_power_gating(adev, enable); + + /* update mgcg state */ +diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +index 605767e79996..7b352c5a451e 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +@@ -475,6 +475,7 @@ struct smu_funcs + int (*check_fw_version)(struct smu_context *smu); + int (*powergate_sdma)(struct smu_context *smu, bool gate); + int (*powergate_vcn)(struct smu_context *smu, bool gate); ++ int (*set_gfx_cgpg)(struct smu_context *smu, bool enable); + int (*write_pptable)(struct smu_context *smu); + int (*set_min_dcef_deep_sleep)(struct smu_context *smu); + int (*set_tool_table_location)(struct smu_context *smu); +@@ -555,6 +556,8 @@ struct smu_funcs + ((smu)->funcs->powergate_sdma ? (smu)->funcs->powergate_sdma((smu), (gate)) : 0) + #define smu_powergate_vcn(smu, gate) \ + ((smu)->funcs->powergate_vcn ? (smu)->funcs->powergate_vcn((smu), (gate)) : 0) ++#define smu_set_gfx_cgpg(smu, enabled) \ ++ ((smu)->funcs->set_gfx_cgpg ? (smu)->funcs->set_gfx_cgpg((smu), (enabled)) : 0) + #define smu_get_vbios_bootup_values(smu) \ + ((smu)->funcs->get_vbios_bootup_values ? (smu)->funcs->get_vbios_bootup_values((smu)) : 0) + #define smu_get_clk_info_from_vbios(smu) \ +diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c +index 695b9af8662b..cf523b8b2aeb 100644 +--- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c ++++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c +@@ -198,6 +198,15 @@ static int smu_v12_0_powergate_vcn(struct smu_context *smu, bool gate) + return smu_send_smc_msg(smu, SMU_MSG_PowerUpVcn); + } + ++static int smu_v12_0_set_gfx_cgpg(struct smu_context *smu, bool enable) ++{ ++ if (!(smu->adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) ++ return 0; ++ ++ return smu_v12_0_send_msg_with_param(smu, ++ SMU_MSG_SetGfxCGPG, enable ? 1 : 0); ++} ++ + static const struct smu_funcs smu_v12_0_funcs = { + .check_fw_status = smu_v12_0_check_fw_status, + .check_fw_version = smu_v12_0_check_fw_version, +@@ -206,6 +215,7 @@ static const struct smu_funcs smu_v12_0_funcs = { + .send_smc_msg = smu_v12_0_send_msg, + .send_smc_msg_with_param = smu_v12_0_send_msg_with_param, + .read_smc_arg = smu_v12_0_read_arg, ++ .set_gfx_cgpg = smu_v12_0_set_gfx_cgpg, + }; + + void smu_v12_0_set_smu_funcs(struct smu_context *smu) +-- +2.17.1 + |