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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3439-drm-amd-display-enable-dcn_mem_pwr-as-golden-setting.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3439-drm-amd-display-enable-dcn_mem_pwr-as-golden-setting.patch32
1 files changed, 32 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3439-drm-amd-display-enable-dcn_mem_pwr-as-golden-setting.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3439-drm-amd-display-enable-dcn_mem_pwr-as-golden-setting.patch
new file mode 100644
index 00000000..e9433cb9
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3439-drm-amd-display-enable-dcn_mem_pwr-as-golden-setting.patch
@@ -0,0 +1,32 @@
+From 606d584baefb7d28887ed4ada3c7932db27f3eb0 Mon Sep 17 00:00:00 2001
+From: Charlene Liu <charlene.liu@amd.com>
+Date: Mon, 29 Jul 2019 11:59:33 -0400
+Subject: [PATCH 3439/4256] drm/amd/display: enable dcn_mem_pwr as golden
+ setting updates
+
+Enable dcn_mem_pwr as golden setting updates
+
+Signed-off-by: Charlene Liu <charlene.liu@amd.com>
+Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
+Acked-by: Leo Li <sunpeng.li@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+index ea3b874497be..c4fced4103bf 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+@@ -142,8 +142,7 @@ void dcn20_display_init(struct dc *dc)
+ /* DCCG */
+ dcn20_dccg_init(hws);
+
+- /* Disable all memory low power mode. All memories are enabled. */
+- REG_UPDATE(DC_MEM_GLOBAL_PWR_REQ_CNTL, DC_MEM_GLOBAL_PWR_REQ_DIS, 1);
++ REG_UPDATE(DC_MEM_GLOBAL_PWR_REQ_CNTL, DC_MEM_GLOBAL_PWR_REQ_DIS, 0);
+
+ /* DCHUB/MMHUBBUB
+ * set global timer refclk divider
+--
+2.17.1
+