diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3413-drm-amd-display-clean-up-DML-for-DCN2x.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3413-drm-amd-display-clean-up-DML-for-DCN2x.patch | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3413-drm-amd-display-clean-up-DML-for-DCN2x.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3413-drm-amd-display-clean-up-DML-for-DCN2x.patch new file mode 100644 index 00000000..74a898de --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3413-drm-amd-display-clean-up-DML-for-DCN2x.patch @@ -0,0 +1,80 @@ +From b0f836172fa28e0aa3b64bc6c473372d6232cab5 Mon Sep 17 00:00:00 2001 +From: Jun Lei <Jun.Lei@amd.com> +Date: Thu, 18 Jul 2019 10:02:40 -0400 +Subject: [PATCH 3413/4256] drm/amd/display: clean up DML for DCN2x + +[why] +Previous "less risky" implemenation of 3 tiered fallback is no longer necessary since +DMLv2 has gone through proper validation. v2 can now be used as the default and 1 +level of fallback can be removed + +[how] +remove previous workaround implemenation + +Signed-off-by: Jun Lei <Jun.Lei@amd.com> +Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dc.h | 1 - + .../drm/amd/display/dc/dcn20/dcn20_resource.c | 19 +++---------------- + 2 files changed, 3 insertions(+), 17 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h +index b9275993fcde..32312827daae 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc.h ++++ b/drivers/gpu/drm/amd/display/dc/dc.h +@@ -124,7 +124,6 @@ struct dc_caps { + struct dc_bug_wa { + bool no_connect_phy_config; + bool dedcn20_305_wa; +- struct display_mode_lib alternate_dml; + bool skip_clock_update; + }; + #endif +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index a26541bafc75..af8ab57a8af5 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -2610,7 +2610,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, + goto restore_dml_state; + } + +- // Fallback #1: Try to only support G6 temperature read latency ++ // Fallback: Try to only support G6 temperature read latency + context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latency_us; + + voltage_supported = dcn20_validate_bandwidth_internal(dc, context, false); +@@ -2621,19 +2621,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, + goto restore_dml_state; + } + +- // Fallback #2: Retry with "new" DCN20 to support G6 temperature read latency +- memcpy (&context->bw_ctx.dml, &dc->work_arounds.alternate_dml, sizeof (struct display_mode_lib)); +- context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latency_us; +- +- voltage_supported = dcn20_validate_bandwidth_internal(dc, context, false); +- dummy_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support; +- +- if (voltage_supported && dummy_pstate_supported) { +- context->bw_ctx.bw.dcn.clk.p_state_change_support = false; +- goto restore_dml_state; +- } +- +- // ERROR: fallback #2 is supposed to always work. ++ // ERROR: fallback is supposed to always work. + ASSERT(false); + + restore_dml_state: +@@ -3238,8 +3226,7 @@ static bool construct( + goto create_fail; + } + +- dml_init_instance(&dc->dml, &dcn2_0_soc, &dcn2_0_ip, DML_PROJECT_NAVI10); +- dml_init_instance(&dc->work_arounds.alternate_dml, &dcn2_0_soc, &dcn2_0_ip, DML_PROJECT_NAVI10v2); ++ dml_init_instance(&dc->dml, &dcn2_0_soc, &dcn2_0_ip, DML_PROJECT_NAVI10v2); + + if (!dc->debug.disable_pplib_wm_range) { + struct pp_smu_wm_range_sets ranges = {0}; +-- +2.17.1 + |