diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3398-drm-amd-display-reset-hdmi-tmds-rate-and-data-scramb.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3398-drm-amd-display-reset-hdmi-tmds-rate-and-data-scramb.patch | 176 |
1 files changed, 176 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3398-drm-amd-display-reset-hdmi-tmds-rate-and-data-scramb.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3398-drm-amd-display-reset-hdmi-tmds-rate-and-data-scramb.patch new file mode 100644 index 00000000..9295676a --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3398-drm-amd-display-reset-hdmi-tmds-rate-and-data-scramb.patch @@ -0,0 +1,176 @@ +From b86f17b2dd5226ec88b5af5829a3f0fce25a0689 Mon Sep 17 00:00:00 2001 +From: Wenjing Liu <Wenjing.Liu@amd.com> +Date: Wed, 10 Jul 2019 18:35:18 -0400 +Subject: [PATCH 3398/4256] drm/amd/display: reset hdmi tmds rate and data + scramble on pipe reset + +[why] +hdmi data scramble and tmds rate is not reset during pipe reset. + +[how] +reset hdmi tmds rate and data scramble on pipe reset + +Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> +Reviewed-by: Chris Park <Chris.Park@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + .../amd/display/dc/dce/dce_stream_encoder.c | 19 +++++++++++++++++++ + .../display/dc/dce110/dce110_hw_sequencer.c | 5 ++++- + .../display/dc/dcn10/dcn10_stream_encoder.c | 14 ++++++++++++++ + .../display/dc/dcn10/dcn10_stream_encoder.h | 3 +++ + .../display/dc/dcn20/dcn20_stream_encoder.c | 1 + + .../amd/display/dc/inc/hw/stream_encoder.h | 3 +++ + .../dc/virtual/virtual_stream_encoder.c | 5 +++++ + 7 files changed, 49 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c +index bd353796b767..7e8b8ae036ee 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c +@@ -1036,6 +1036,24 @@ static void dce110_stream_encoder_set_avmute( + } + + ++static void dce110_reset_hdmi_stream_attribute( ++ struct stream_encoder *enc) ++{ ++ struct dce110_stream_encoder *enc110 = DCE110STRENC_FROM_STRENC(enc); ++ if (enc110->se_mask->HDMI_DATA_SCRAMBLE_EN) ++ REG_UPDATE_5(HDMI_CONTROL, ++ HDMI_PACKET_GEN_VERSION, 1, ++ HDMI_KEEPOUT_MODE, 1, ++ HDMI_DEEP_COLOR_ENABLE, 0, ++ HDMI_DATA_SCRAMBLE_EN, 0, ++ HDMI_CLOCK_CHANNEL_RATE, 0); ++ else ++ REG_UPDATE_3(HDMI_CONTROL, ++ HDMI_PACKET_GEN_VERSION, 1, ++ HDMI_KEEPOUT_MODE, 1, ++ HDMI_DEEP_COLOR_ENABLE, 0); ++} ++ + #define DP_SEC_AUD_N__DP_SEC_AUD_N__DEFAULT 0x8000 + #define DP_SEC_TIMESTAMP__DP_SEC_TIMESTAMP_MODE__AUTO_CALC 1 + +@@ -1616,6 +1634,7 @@ static const struct stream_encoder_funcs dce110_str_enc_funcs = { + .setup_stereo_sync = setup_stereo_sync, + .set_avmute = dce110_stream_encoder_set_avmute, + .dig_connect_to_otg = dig_connect_to_otg, ++ .hdmi_reset_stream_attribute = dce110_reset_hdmi_stream_attribute, + }; + + void dce110_stream_encoder_construct( +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +index 46dfab749679..919647166bce 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +@@ -1037,9 +1037,12 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx, int option) + struct dc_link *link = stream->link; + struct dc *dc = pipe_ctx->stream->ctx->dc; + +- if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) ++ if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) { + pipe_ctx->stream_res.stream_enc->funcs->stop_hdmi_info_packets( + pipe_ctx->stream_res.stream_enc); ++ pipe_ctx->stream_res.stream_enc->funcs->hdmi_reset_stream_attribute( ++ pipe_ctx->stream_res.stream_enc); ++ } + + if (dc_is_dp_signal(pipe_ctx->stream->signal)) + pipe_ctx->stream_res.stream_enc->funcs->stop_dp_info_packets( +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c +index a098287d71ae..00aa9dde5538 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c +@@ -1003,6 +1003,19 @@ void enc1_stream_encoder_set_avmute( + REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value); + } + ++void enc1_reset_hdmi_stream_attribute( ++ struct stream_encoder *enc) ++{ ++ struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); ++ ++ REG_UPDATE_5(HDMI_CONTROL, ++ HDMI_PACKET_GEN_VERSION, 1, ++ HDMI_KEEPOUT_MODE, 1, ++ HDMI_DEEP_COLOR_ENABLE, 0, ++ HDMI_DATA_SCRAMBLE_EN, 0, ++ HDMI_CLOCK_CHANNEL_RATE, 0); ++} ++ + + #define DP_SEC_AUD_N__DP_SEC_AUD_N__DEFAULT 0x8000 + #define DP_SEC_TIMESTAMP__DP_SEC_TIMESTAMP_MODE__AUTO_CALC 1 +@@ -1562,6 +1575,7 @@ static const struct stream_encoder_funcs dcn10_str_enc_funcs = { + .setup_stereo_sync = enc1_setup_stereo_sync, + .set_avmute = enc1_stream_encoder_set_avmute, + .dig_connect_to_otg = enc1_dig_connect_to_otg, ++ .hdmi_reset_stream_attribute = enc1_reset_hdmi_stream_attribute, + }; + + void dcn10_stream_encoder_construct( +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h +index f585e7b620cc..8b8921e75984 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h +@@ -615,4 +615,7 @@ void get_audio_clock_info( + uint32_t actual_pixel_clock_100Hz, + struct audio_clock_info *audio_clock_info); + ++void enc1_reset_hdmi_stream_attribute( ++ struct stream_encoder *enc); ++ + #endif /* __DC_STREAM_ENCODER_DCN10_H__ */ +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c +index 403f1f865a06..b2c1cad3c94f 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c +@@ -586,6 +586,7 @@ static const struct stream_encoder_funcs dcn20_str_enc_funcs = { + .dp_set_dsc_config = enc2_dp_set_dsc_config, + #endif + .set_dynamic_metadata = enc2_set_dynamic_metadata, ++ .hdmi_reset_stream_attribute = enc1_reset_hdmi_stream_attribute, + }; + + void dcn20_stream_encoder_construct( +diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h +index ed7d9588b309..38e2c3e7412e 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h +@@ -211,6 +211,9 @@ struct stream_encoder_funcs { + struct stream_encoder *enc, + int tg_inst); + ++ void (*hdmi_reset_stream_attribute)( ++ struct stream_encoder *enc); ++ + #if defined(CONFIG_DRM_AMD_DC_DCN2_0) + #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT + void (*dp_set_dsc_config)( +diff --git a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c +index 768bc8c75b6a..0c6d502da8a6 100644 +--- a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c ++++ b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c +@@ -75,6 +75,10 @@ static void virtual_audio_mute_control( + struct stream_encoder *enc, + bool mute) {} + ++static void virtual_stream_encoder_reset_hdmi_stream_attribute( ++ struct stream_encoder *enc) ++{} ++ + #ifdef CONFIG_DRM_AMD_DC_DCN2_0 + #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT + static void virtual_enc_dp_set_odm_combine( +@@ -114,6 +118,7 @@ static const struct stream_encoder_funcs virtual_str_enc_funcs = { + + .audio_mute_control = virtual_audio_mute_control, + .set_avmute = virtual_stream_encoder_set_avmute, ++ .hdmi_reset_stream_attribute = virtual_stream_encoder_reset_hdmi_stream_attribute, + }; + + bool virtual_stream_encoder_construct( +-- +2.17.1 + |