diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3373-drm-amdgpu-add-gmc-v9-supports-for-renoir.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3373-drm-amdgpu-add-gmc-v9-supports-for-renoir.patch | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3373-drm-amdgpu-add-gmc-v9-supports-for-renoir.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3373-drm-amdgpu-add-gmc-v9-supports-for-renoir.patch new file mode 100644 index 00000000..176d4ab6 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3373-drm-amdgpu-add-gmc-v9-supports-for-renoir.patch @@ -0,0 +1,73 @@ +From 35fedcbcf12b52ee3181b6f9d9eb1f258db9b1c0 Mon Sep 17 00:00:00 2001 +From: Huang Rui <ray.huang@amd.com> +Date: Wed, 24 Jul 2019 13:42:16 -0500 +Subject: [PATCH 3373/4256] drm/amdgpu: add gmc v9 supports for renoir + +Add gfx memory controller support for renoir. + +Acked-by: Huang Rui <ray.huang@amd.com> +Signed-off-by: Huang Rui <ray.huang@amd.com> +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index 37c0d085d5c9..e42c2a4dadac 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -696,6 +696,7 @@ static bool gmc_v9_0_keep_stolen_memory(struct amdgpu_device *adev) + case CHIP_VEGA10: + case CHIP_RAVEN: + case CHIP_ARCTURUS: ++ case CHIP_RENOIR: + return true; + case CHIP_VEGA12: + case CHIP_VEGA20: +@@ -1002,6 +1003,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev) + adev->gmc.gart_size = 512ULL << 20; + break; + case CHIP_RAVEN: /* DCE SG support */ ++ case CHIP_RENOIR: + adev->gmc.gart_size = 1024ULL << 20; + break; + } +@@ -1052,6 +1054,7 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev) + + switch (adev->asic_type) { + case CHIP_RAVEN: ++ case CHIP_RENOIR: + viewport = RREG32_SOC15(DCE, 0, mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION); + size = (REG_GET_FIELD(viewport, + HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) * +@@ -1108,8 +1111,10 @@ static int gmc_v9_0_sw_init(void *handle) + case CHIP_VEGA10: + case CHIP_VEGA12: + case CHIP_VEGA20: ++ case CHIP_RENOIR: + adev->num_vmhubs = 2; + ++ + /* + * To fulfill 4-level page support, + * vm size is 256TB (48bit), maximum size of Vega10, +@@ -1281,6 +1286,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) + case CHIP_VEGA12: + break; + case CHIP_RAVEN: ++ /* TODO for renoir */ + soc15_program_register_sequence(adev, + golden_settings_athub_1_0_0, + ARRAY_SIZE(golden_settings_athub_1_0_0)); +@@ -1315,6 +1321,7 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev) + + switch (adev->asic_type) { + case CHIP_RAVEN: ++ /* TODO for renoir */ + mmhub_v1_0_update_power_gating(adev, true); + break; + default: +-- +2.17.1 + |