diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3353-drm-amdgpu-fix-transform-feedback-GDS-hang-on-gfx10-.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3353-drm-amdgpu-fix-transform-feedback-GDS-hang-on-gfx10-.patch | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3353-drm-amdgpu-fix-transform-feedback-GDS-hang-on-gfx10-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3353-drm-amdgpu-fix-transform-feedback-GDS-hang-on-gfx10-.patch new file mode 100644 index 00000000..df7d27fc --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3353-drm-amdgpu-fix-transform-feedback-GDS-hang-on-gfx10-.patch @@ -0,0 +1,77 @@ +From 989b9e2b38a64202d237c30da82f31082110c885 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com> +Date: Wed, 19 Jun 2019 19:26:24 -0400 +Subject: [PATCH 3353/4256] drm/amdgpu: fix transform feedback GDS hang on + gfx10 (v2) +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +v2: update emit_ib_size +(though it's still wrong because it was wrong before) + +Signed-off-by: Marek Olšák <marek.olsak@amd.com> +Acked-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h | 3 ++- + drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 14 +++++++++++--- + 2 files changed, 13 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h +index dad2186f4ed5..df8a23554831 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h +@@ -31,7 +31,8 @@ struct amdgpu_gds { + uint32_t gds_size; + uint32_t gws_size; + uint32_t oa_size; +- uint32_t gds_compute_max_wave_id; ++ uint32_t gds_compute_max_wave_id; ++ uint32_t vgt_gs_max_wave_id; + }; + + struct amdgpu_gds_reg_offset { +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +index beee75df22a0..ba8f66f27d2f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +@@ -4360,6 +4360,15 @@ static void gfx_v10_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, + unsigned vmid = AMDGPU_JOB_GET_VMID(job); + u32 header, control = 0; + ++ /* Prevent a hw deadlock due to a wave ID mismatch between ME and GDS. ++ * This resets the wave ID counters. (needed by transform feedback) ++ * TODO: This might only be needed on a VMID switch when we change ++ * the GDS OA mapping, not sure. ++ */ ++ amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); ++ amdgpu_ring_write(ring, mmVGT_GS_MAX_WAVE_ID); ++ amdgpu_ring_write(ring, ring->adev->gds.vgt_gs_max_wave_id); ++ + if (ib->flags & AMDGPU_IB_FLAG_CE) + header = PACKET3(PACKET3_INDIRECT_BUFFER_CNST, 2); + else +@@ -5094,7 +5103,7 @@ static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_gfx = { + 5 + /* HDP_INVL */ + 8 + 8 + /* FENCE x2 */ + 2, /* SWITCH_BUFFER */ +- .emit_ib_size = 4, /* gfx_v10_0_ring_emit_ib_gfx */ ++ .emit_ib_size = 7, /* gfx_v10_0_ring_emit_ib_gfx */ + .emit_ib = gfx_v10_0_ring_emit_ib_gfx, + .emit_fence = gfx_v10_0_ring_emit_fence, + .emit_pipeline_sync = gfx_v10_0_ring_emit_pipeline_sync, +@@ -5244,10 +5253,9 @@ static void gfx_v10_0_set_gds_init(struct amdgpu_device *adev) + /* init asic gds info */ + switch (adev->asic_type) { + case CHIP_NAVI10: +- adev->gds.gds_size = 0x10000; +- break; + default: + adev->gds.gds_size = 0x10000; ++ adev->gds.vgt_gs_max_wave_id = 0x3ff; + break; + } + +-- +2.17.1 + |