diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3329-drm-amdgpu-increase-CGCG-gfx-idle-threshold-for-Arct.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3329-drm-amdgpu-increase-CGCG-gfx-idle-threshold-for-Arct.patch | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3329-drm-amdgpu-increase-CGCG-gfx-idle-threshold-for-Arct.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3329-drm-amdgpu-increase-CGCG-gfx-idle-threshold-for-Arct.patch new file mode 100644 index 00000000..b695403b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3329-drm-amdgpu-increase-CGCG-gfx-idle-threshold-for-Arct.patch @@ -0,0 +1,37 @@ +From 0879632dc82a1b84522bec8129a9c568abe6bd16 Mon Sep 17 00:00:00 2001 +From: Le Ma <le.ma@amd.com> +Date: Fri, 9 Aug 2019 15:13:38 +0800 +Subject: [PATCH 3329/4256] drm/amdgpu: increase CGCG gfx idle threshold for + Arcturus + +Follow the hw spec, and no need to consider gfxoff on Arcturus + +Change-Id: Ib9cad79b1b9c096014447fc0a7d29cdb594e15e3 +Signed-off-by: Le Ma <le.ma@amd.com> +Reviewed-by: Kevin Wang <kevin1.wang@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index c04cf92214e1..713f73ac1c61 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -4685,8 +4685,12 @@ static void gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev + /* enable cgcg FSM(0x0000363F) */ + def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL); + +- data = (0x36 << RLC_CGCG_CGLS_CTRL__CGCG_GFX_IDLE_THRESHOLD__SHIFT) | +- RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; ++ if (adev->asic_type == CHIP_ARCTURUS) ++ data = (0x2000 << RLC_CGCG_CGLS_CTRL__CGCG_GFX_IDLE_THRESHOLD__SHIFT) | ++ RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; ++ else ++ data = (0x36 << RLC_CGCG_CGLS_CTRL__CGCG_GFX_IDLE_THRESHOLD__SHIFT) | ++ RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; + if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS) + data |= (0x000F << RLC_CGCG_CGLS_CTRL__CGLS_REP_COMPANSAT_DELAY__SHIFT) | + RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; +-- +2.17.1 + |