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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3234-drm-amdgpu-support-get_cu_info-for-Arcturus.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3234-drm-amdgpu-support-get_cu_info-for-Arcturus.patch96
1 files changed, 96 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3234-drm-amdgpu-support-get_cu_info-for-Arcturus.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3234-drm-amdgpu-support-get_cu_info-for-Arcturus.patch
new file mode 100644
index 00000000..cebd9fd9
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3234-drm-amdgpu-support-get_cu_info-for-Arcturus.patch
@@ -0,0 +1,96 @@
+From dc532463d4d4334dcbb16c104e5efa9329eba89b Mon Sep 17 00:00:00 2001
+From: Le Ma <le.ma@amd.com>
+Date: Mon, 8 Jul 2019 20:17:48 +0800
+Subject: [PATCH 3234/4256] drm/amdgpu: support get_cu_info for Arcturus
+
+This change is because SE/SH layout on Arcturus is 8*1, different from
+4*2(or 4*1) on Vega ASICs.
+
+Currently the cu bitmap array is 4x4 size, and besides the bitmap is used widely
+across SW stack. To mostly reduce the scale of impact, we make the cu bitmap
+array compatible with SE/SH layout on Arcturus. Then the store of cu bits of
+each shader array for Arcturus will be like below:
+ SE0,SH0 --> bitmap[0][0]
+ SE1,SH0 --> bitmap[1][0]
+ SE2,SH0 --> bitmap[2][0]
+ SE3,SH0 --> bitmap[3][0]
+ SE4,SH0 --> bitmap[0][1]
+ SE5,SH0 --> bitmap[1][1]
+ SE6,SH0 --> bitmap[2][1]
+ SE7,SH0 --> bitmap[3][1]
+
+Signed-off-by: Le Ma <le.ma@amd.com>
+Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 35 +++++++++++++++++++++------
+ 1 file changed, 28 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+index 1ba428d5c2e1..3a8fc96032ef 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+@@ -6360,12 +6360,21 @@ static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev,
+ {
+ int i, j, k, counter, active_cu_number = 0;
+ u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0;
+- unsigned disable_masks[4 * 2];
++ unsigned disable_masks[4 * 4];
+
+ if (!adev || !cu_info)
+ return -EINVAL;
+
+- amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2);
++ /*
++ * 16 comes from bitmap array size 4*4, and it can cover all gfx9 ASICs
++ */
++ if (adev->gfx.config.max_shader_engines *
++ adev->gfx.config.max_sh_per_se > 16)
++ return -EINVAL;
++
++ amdgpu_gfx_parse_disable_cu(disable_masks,
++ adev->gfx.config.max_shader_engines,
++ adev->gfx.config.max_sh_per_se);
+
+ mutex_lock(&adev->grbm_idx_mutex);
+ for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
+@@ -6374,11 +6383,23 @@ static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev,
+ ao_bitmap = 0;
+ counter = 0;
+ gfx_v9_0_select_se_sh(adev, i, j, 0xffffffff);
+- if (i < 4 && j < 2)
+- gfx_v9_0_set_user_cu_inactive_bitmap(
+- adev, disable_masks[i * 2 + j]);
++ gfx_v9_0_set_user_cu_inactive_bitmap(
++ adev, disable_masks[i * adev->gfx.config.max_sh_per_se + j]);
+ bitmap = gfx_v9_0_get_cu_active_bitmap(adev);
+- cu_info->bitmap[i][j] = bitmap;
++
++ /*
++ * The bitmap(and ao_cu_bitmap) in cu_info structure is
++ * 4x4 size array, and it's usually suitable for Vega
++ * ASICs which has 4*2 SE/SH layout.
++ * But for Arcturus, SE/SH layout is changed to 8*1.
++ * To mostly reduce the impact, we make it compatible
++ * with current bitmap array as below:
++ * SE4,SH0 --> bitmap[0][1]
++ * SE5,SH0 --> bitmap[1][1]
++ * SE6,SH0 --> bitmap[2][1]
++ * SE7,SH0 --> bitmap[3][1]
++ */
++ cu_info->bitmap[i % 4][j + i / 4] = bitmap;
+
+ for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) {
+ if (bitmap & mask) {
+@@ -6391,7 +6412,7 @@ static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev,
+ active_cu_number += counter;
+ if (i < 2 && j < 2)
+ ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
+- cu_info->ao_cu_bitmap[i][j] = ao_bitmap;
++ cu_info->ao_cu_bitmap[i % 4][j + i / 4] = ao_bitmap;
+ }
+ }
+ gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
+--
+2.17.1
+