diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3206-drm-amdgpu-switch-to-amdgpu_umc-structure.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3206-drm-amdgpu-switch-to-amdgpu_umc-structure.patch | 99 |
1 files changed, 99 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3206-drm-amdgpu-switch-to-amdgpu_umc-structure.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3206-drm-amdgpu-switch-to-amdgpu_umc-structure.patch new file mode 100644 index 00000000..05a33567 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3206-drm-amdgpu-switch-to-amdgpu_umc-structure.patch @@ -0,0 +1,99 @@ +From 0d9146882b97dfa5a65350f6269e58f8c9524091 Mon Sep 17 00:00:00 2001 +From: Tao Zhou <tao.zhou1@amd.com> +Date: Tue, 23 Jul 2019 12:18:39 +0800 +Subject: [PATCH 3206/4256] drm/amdgpu: switch to amdgpu_umc structure + +create new amdgpu_umc structure to for more umc +settings in future and switch to the new structure + +Signed-off-by: Tao Zhou <tao.zhou1@amd.com> +Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> +Reviewed-by: Dennis Li <dennis.li@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +++- + drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 6 ++++++ + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 +++++--- + 4 files changed, 16 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index 8aa67b43e974..9ef363f02f8a 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -988,6 +988,9 @@ struct amdgpu_device { + /* KFD */ + struct amdgpu_kfd_dev kfd; + ++ /* UMC */ ++ struct amdgpu_umc umc; ++ + /* display related functionality */ + struct amdgpu_display_manager dm; + +@@ -1013,7 +1016,6 @@ struct amdgpu_device { + + const struct amdgpu_nbio_funcs *nbio_funcs; + const struct amdgpu_df_funcs *df_funcs; +- const struct amdgpu_umc_funcs *umc_funcs; + + /* delayed work_func for deferring clockgating during resume */ + struct delayed_work delayed_init_work; +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +index 4f81b1f6d09f..e087da46fc24 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +@@ -593,8 +593,8 @@ int amdgpu_ras_error_query(struct amdgpu_device *adev, + + switch (info->head.block) { + case AMDGPU_RAS_BLOCK__UMC: +- if (adev->umc_funcs->query_ras_error_count) +- adev->umc_funcs->query_ras_error_count(adev, &err_data); ++ if (adev->umc.funcs->query_ras_error_count) ++ adev->umc.funcs->query_ras_error_count(adev, &err_data); + break; + default: + break; +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h +index 1ee1a00e5ac8..f5d6def96414 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h +@@ -26,4 +26,10 @@ struct amdgpu_umc_funcs { + void *ras_error_status); + }; + ++struct amdgpu_umc { ++ /* max error count in one ras query call */ ++ uint32_t max_ras_err_cnt_per_query; ++ const struct amdgpu_umc_funcs *funcs; ++}; ++ + #endif +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index fe22eb40d384..111ca34fdafe 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -243,8 +243,8 @@ static int gmc_v9_0_process_ras_data_cb(struct amdgpu_device *adev, + { + struct ras_err_data err_data = {0, 0}; + kgd2kfd_set_sram_ecc_flag(adev->kfd.dev); +- if (adev->umc_funcs->query_ras_error_count) +- adev->umc_funcs->query_ras_error_count(adev, &err_data); ++ if (adev->umc.funcs->query_ras_error_count) ++ adev->umc.funcs->query_ras_error_count(adev, &err_data); + amdgpu_ras_reset_gpu(adev, 0); + return AMDGPU_RAS_UE; + } +@@ -628,7 +628,9 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev) + { + switch (adev->asic_type) { + case CHIP_VEGA20: +- adev->umc_funcs = &umc_v6_1_funcs; ++ adev->umc.max_ras_err_cnt_per_query = ++ UMC_V6_1_UMC_INSTANCE_NUM * UMC_V6_1_CHANNEL_INSTANCE_NUM; ++ adev->umc.funcs = &umc_v6_1_funcs; + break; + default: + break; +-- +2.17.1 + |