diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3201-drm-amdgpu-init-umc-v6_1-functions-for-vega20.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3201-drm-amdgpu-init-umc-v6_1-functions-for-vega20.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3201-drm-amdgpu-init-umc-v6_1-functions-for-vega20.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3201-drm-amdgpu-init-umc-v6_1-functions-for-vega20.patch new file mode 100644 index 00000000..ee23add0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3201-drm-amdgpu-init-umc-v6_1-functions-for-vega20.patch @@ -0,0 +1,61 @@ +From 8c828c0f40f806a1cd9a0a98c450349085c49c50 Mon Sep 17 00:00:00 2001 +From: Hawking Zhang <Hawking.Zhang@amd.com> +Date: Wed, 17 Jul 2019 21:47:44 +0800 +Subject: [PATCH 3201/4256] drm/amdgpu: init umc v6_1 functions for vega20 + +init umc callback function for vega20 in sw early init phase + +Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> +Reviewed-by: Dennis Li <dennis.li@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index f99e02649f81..ac5a6bf477cb 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -45,6 +45,7 @@ + #include "mmhub_v1_0.h" + #include "gfxhub_v1_1.h" + #include "mmhub_v9_4.h" ++#include "umc_v6_1.h" + + #include "ivsrcid/vmc/irqsrcs_vmc_1_0.h" + +@@ -620,12 +621,24 @@ static void gmc_v9_0_set_gmc_funcs(struct amdgpu_device *adev) + adev->gmc.gmc_funcs = &gmc_v9_0_gmc_funcs; + } + ++static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev) ++{ ++ switch (adev->asic_type) { ++ case CHIP_VEGA20: ++ adev->umc_funcs = &umc_v6_1_funcs; ++ break; ++ default: ++ break; ++ } ++} ++ + static int gmc_v9_0_early_init(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + + gmc_v9_0_set_gmc_funcs(adev); + gmc_v9_0_set_irq_funcs(adev); ++ gmc_v9_0_set_umc_funcs(adev); + + adev->gmc.shared_aperture_start = 0x2000000000000000ULL; + adev->gmc.shared_aperture_end = +@@ -714,6 +727,7 @@ static int gmc_v9_0_ecc_late_init(void *handle) + amdgpu_ras_feature_enable_on_boot(adev, &ras_block, 0); + return 0; + } ++ + /* handle resume path. */ + if (*ras_if) { + /* resend ras TA enable cmd during resume. +-- +2.17.1 + |