diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3196-drm-amdgpu-init-RSMU-and-UMC-ip-base-address-for-veg.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3196-drm-amdgpu-init-RSMU-and-UMC-ip-base-address-for-veg.patch | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3196-drm-amdgpu-init-RSMU-and-UMC-ip-base-address-for-veg.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3196-drm-amdgpu-init-RSMU-and-UMC-ip-base-address-for-veg.patch new file mode 100644 index 00000000..d17e038e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3196-drm-amdgpu-init-RSMU-and-UMC-ip-base-address-for-veg.patch @@ -0,0 +1,45 @@ +From 5c36ab60839fe88bb92e5324583558b9a61bf83d Mon Sep 17 00:00:00 2001 +From: Hawking Zhang <Hawking.Zhang@amd.com> +Date: Wed, 17 Jul 2019 17:52:28 +0800 +Subject: [PATCH 3196/4256] drm/amdgpu: init RSMU and UMC ip base address for + vega20 + +the driver needs to program RSMU and UMC registers to +support vega20 RAS feature + +Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> +Reviewed-by: Dennis Li <dennis.li@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++ + drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 2 ++ + 2 files changed, 4 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index 015ebcf3de17..c16bce6181fa 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -768,6 +768,8 @@ enum amd_hw_ip_block_type { + NBIF_HWIP, + THM_HWIP, + CLK_HWIP, ++ UMC_HWIP, ++ RSMU_HWIP, + MAX_HWIP + }; + +diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c +index 79223188bd47..587e33f5dcce 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c ++++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c +@@ -50,6 +50,8 @@ int vega20_reg_base_init(struct amdgpu_device *adev) + adev->reg_offset[NBIF_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); + adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); + adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); ++ adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); ++ adev->reg_offset[RSMU_HWIP][i] = (uint32_t *)(&(RSMU_BASE.instance[i])); + } + return 0; + } +-- +2.17.1 + |