diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3170-drm-amd-powerplay-enable-SW-SMU-routine-support-for-.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3170-drm-amd-powerplay-enable-SW-SMU-routine-support-for-.patch | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3170-drm-amd-powerplay-enable-SW-SMU-routine-support-for-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3170-drm-amd-powerplay-enable-SW-SMU-routine-support-for-.patch new file mode 100644 index 00000000..fc3da04d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3170-drm-amd-powerplay-enable-SW-SMU-routine-support-for-.patch @@ -0,0 +1,111 @@ +From 6f977f9facf0e317e68ae3f99788330b010e7eaa Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Mon, 29 Jul 2019 12:50:42 -0500 +Subject: [PATCH 3170/4256] drm/amd/powerplay: enable SW SMU routine support + for arcturus + +Enable arcturus SW SMU routines. + +Change-Id: I2ddba23f12090ac68f440713bc007c671238c54a +Signed-off-by: Evan Quan <evan.quan@amd.com> +Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 49 +++++++++++++--------- + 1 file changed, 30 insertions(+), 19 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +index c45fa2fb4da9..8ebfe41a4dc9 100644 +--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c ++++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +@@ -476,7 +476,7 @@ bool is_support_sw_smu(struct amdgpu_device *adev) + { + if (adev->asic_type == CHIP_VEGA20) + return (amdgpu_dpm == 2) ? true: false; +- else if (adev->asic_type >= CHIP_NAVI10) ++ else if (adev->asic_type >= CHIP_ARCTURUS) + return true; + else + return false; +@@ -708,6 +708,7 @@ static int smu_set_funcs(struct amdgpu_device *adev) + case CHIP_VEGA20: + case CHIP_NAVI10: + case CHIP_NAVI14: ++ case CHIP_ARCTURUS: + if (adev->pm.pp_feature & PP_OVERDRIVE_MASK) + smu->od_enabled = true; + smu_v11_0_set_smu_funcs(smu); +@@ -1013,9 +1014,11 @@ static int smu_smc_table_hw_init(struct smu_context *smu, + return 0; + } + +- ret = smu_init_display_count(smu, 0); +- if (ret) +- return ret; ++ if (adev->asic_type != CHIP_ARCTURUS) { ++ ret = smu_init_display_count(smu, 0); ++ if (ret) ++ return ret; ++ } + + if (initialize) { + /* get boot_values from vbios to set revision, gfxclk, and etc. */ +@@ -1091,17 +1094,19 @@ static int smu_smc_table_hw_init(struct smu_context *smu, + if (ret) + return ret; + +- ret = smu_notify_display_change(smu); +- if (ret) +- return ret; ++ if (adev->asic_type != CHIP_ARCTURUS) { ++ ret = smu_notify_display_change(smu); ++ if (ret) ++ return ret; + +- /* +- * Set min deep sleep dce fclk with bootup value from vbios via +- * SetMinDeepSleepDcefclk MSG. +- */ +- ret = smu_set_min_dcef_deep_sleep(smu); +- if (ret) +- return ret; ++ /* ++ * Set min deep sleep dce fclk with bootup value from vbios via ++ * SetMinDeepSleepDcefclk MSG. ++ */ ++ ret = smu_set_min_dcef_deep_sleep(smu); ++ if (ret) ++ return ret; ++ } + + /* + * Set initialized values (get from vbios) to dpm tables context such as +@@ -1212,14 +1217,20 @@ static int smu_hw_init(void *handle) + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + struct smu_context *smu = &adev->smu; + +- if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { +- ret = smu_check_fw_status(smu); +- if (ret) { +- pr_err("SMC firmware status is not correct\n"); +- return ret; ++ if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { ++ if (adev->asic_type < CHIP_NAVI10) { ++ ret = smu_load_microcode(smu); ++ if (ret) ++ return ret; + } + } + ++ ret = smu_check_fw_status(smu); ++ if (ret) { ++ pr_err("SMC firmware status is not correct\n"); ++ return ret; ++ } ++ + if (!smu->pm_enabled) + return 0; + +-- +2.17.1 + |