diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3154-drm-amdgpu-fix-error-handling-in-amdgpu_cs_process_f.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3154-drm-amdgpu-fix-error-handling-in-amdgpu_cs_process_f.patch | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3154-drm-amdgpu-fix-error-handling-in-amdgpu_cs_process_f.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3154-drm-amdgpu-fix-error-handling-in-amdgpu_cs_process_f.patch new file mode 100644 index 00000000..aec8e875 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3154-drm-amdgpu-fix-error-handling-in-amdgpu_cs_process_f.patch @@ -0,0 +1,67 @@ +From 9f1b02fbe6751f968b493cae1e8b31ef36490d05 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Tue, 30 Jul 2019 11:17:03 +0200 +Subject: [PATCH 3154/4256] drm/amdgpu: fix error handling in + amdgpu_cs_process_fence_dep +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +We always need to drop the ctx reference and should check +for errors first and then dereference the fence pointer. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Chunming Zhou <david1.zhou@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 26 ++++++++++++-------------- + 1 file changed, 12 insertions(+), 14 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +index fe2901d470d5..e745432315be 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +@@ -1035,29 +1035,27 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p, + return r; + } + +- fence = amdgpu_ctx_get_fence(ctx, entity, +- deps[i].handle); ++ fence = amdgpu_ctx_get_fence(ctx, entity, deps[i].handle); ++ amdgpu_ctx_put(ctx); ++ ++ if (IS_ERR(fence)) ++ return PTR_ERR(fence); ++ else if (!fence) ++ continue; + + if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) { +- struct drm_sched_fence *s_fence = to_drm_sched_fence(fence); ++ struct drm_sched_fence *s_fence; + struct dma_fence *old = fence; + ++ s_fence = to_drm_sched_fence(fence); + fence = dma_fence_get(&s_fence->scheduled); + dma_fence_put(old); + } + +- if (IS_ERR(fence)) { +- r = PTR_ERR(fence); +- amdgpu_ctx_put(ctx); ++ r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true); ++ dma_fence_put(fence); ++ if (r) + return r; +- } else if (fence) { +- r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, +- true); +- dma_fence_put(fence); +- amdgpu_ctx_put(ctx); +- if (r) +- return r; +- } + } + return 0; + } +-- +2.17.1 + |