diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3139-drm-amdgpu-put-the-SMC-into-the-proper-state-on-rese.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3139-drm-amdgpu-put-the-SMC-into-the-proper-state-on-rese.patch | 106 |
1 files changed, 106 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3139-drm-amdgpu-put-the-SMC-into-the-proper-state-on-rese.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3139-drm-amdgpu-put-the-SMC-into-the-proper-state-on-rese.patch new file mode 100644 index 00000000..e05b8eb5 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3139-drm-amdgpu-put-the-SMC-into-the-proper-state-on-rese.patch @@ -0,0 +1,106 @@ +From 20db592b684f4023488f5329a9d1015af2f8cef1 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Thu, 25 Jul 2019 11:44:59 -0500 +Subject: [PATCH 3139/4256] drm/amdgpu: put the SMC into the proper state on + reset/unload + +When doing a GPU reset or unloading the driver, we need to +put the SMU into the apprpriate state for the re-init after +the reset or unload to reliably work. + +I don't think this is necessary for BACO because the SMU actually +controls the BACO state to it needs to be active. + +For suspend (S3), the asic is put into D3 so the SMU would be +powered down so I don't think we need to put the SMU into +any special state. + +Reviewed-by: Evan Quan <evan.quan@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 27 ++++++++++++++++++++++ + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 ++ + 3 files changed, 30 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index ba666a4afdfe..015ebcf3de17 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -1030,6 +1030,7 @@ struct amdgpu_device { + /* record last mm index being written through WREG32*/ + unsigned long last_mm_index; + bool in_gpu_reset; ++ enum pp_mp1_state mp1_state; + struct mutex lock_reset; + struct amdgpu_doorbell_index doorbell_index; + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 429794becdcd..23d0301aad4d 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -2167,6 +2167,21 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev) + DRM_ERROR("suspend of IP block <%s> failed %d\n", + adev->ip_blocks[i].version->funcs->name, r); + } ++ /* handle putting the SMC in the appropriate state */ ++ if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) { ++ if (is_support_sw_smu(adev)) { ++ /* todo */ ++ } else if (adev->powerplay.pp_funcs && ++ adev->powerplay.pp_funcs->set_mp1_state) { ++ r = adev->powerplay.pp_funcs->set_mp1_state( ++ adev->powerplay.pp_handle, ++ adev->mp1_state); ++ if (r) { ++ DRM_ERROR("SMC failed to set mp1 state %d, %d\n", ++ adev->mp1_state, r); ++ } ++ } ++ } + } + + return 0; +@@ -3641,6 +3656,17 @@ static bool amdgpu_device_lock_adev(struct amdgpu_device *adev, bool trylock) + + atomic_inc(&adev->gpu_reset_counter); + adev->in_gpu_reset = 1; ++ switch (amdgpu_asic_reset_method(adev)) { ++ case AMD_RESET_METHOD_MODE1: ++ adev->mp1_state = PP_MP1_STATE_SHUTDOWN; ++ break; ++ case AMD_RESET_METHOD_MODE2: ++ adev->mp1_state = PP_MP1_STATE_RESET; ++ break; ++ default: ++ adev->mp1_state = PP_MP1_STATE_NONE; ++ break; ++ } + /* Block kfd: SRIOV would do it separately */ + if (!amdgpu_sriov_vf(adev)) + amdgpu_amdkfd_pre_reset(adev); +@@ -3654,6 +3680,7 @@ static void amdgpu_device_unlock_adev(struct amdgpu_device *adev) + if (!amdgpu_sriov_vf(adev)) + amdgpu_amdkfd_post_reset(adev); + amdgpu_vf_error_trans_all(adev); ++ adev->mp1_state = PP_MP1_STATE_NONE; + adev->in_gpu_reset = 0; + mutex_unlock(&adev->lock_reset); + } +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +index 1d72e2e784d0..2c0e077d209f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +@@ -1131,7 +1131,9 @@ amdgpu_pci_shutdown(struct pci_dev *pdev) + * unfortunately we can't detect certain + * hypervisors so just do this all the time. + */ ++ adev->mp1_state = PP_MP1_STATE_UNLOAD; + amdgpu_device_ip_suspend(adev); ++ adev->mp1_state = PP_MP1_STATE_NONE; + } + + static int amdgpu_pmops_suspend(struct device *dev) +-- +2.17.1 + |