diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3133-drm-amdgpu-add-reset_method-asic-callback-for-soc15.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3133-drm-amdgpu-add-reset_method-asic-callback-for-soc15.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3133-drm-amdgpu-add-reset_method-asic-callback-for-soc15.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3133-drm-amdgpu-add-reset_method-asic-callback-for-soc15.patch new file mode 100644 index 00000000..732a2d16 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3133-drm-amdgpu-add-reset_method-asic-callback-for-soc15.patch @@ -0,0 +1,64 @@ +From 17ee4a1e296d912c82b43ede367c7b7091699e9e Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Tue, 23 Jul 2019 23:47:06 -0500 +Subject: [PATCH 3133/4256] drm/amdgpu: add reset_method asic callback for + soc15 + +APUs only support mode2 reset. dGPUs use either mode1 or +baco depending on various conditions. + +Reviewed-by: Evan Quan <evan.quan@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/soc15.c | 17 +++++++++++++++-- + 1 file changed, 15 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c +index f67ecf814c8c..4405b983dd09 100644 +--- a/drivers/gpu/drm/amd/amdgpu/soc15.c ++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c +@@ -464,12 +464,14 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev) + return 0; + } + +-static int soc15_asic_reset(struct amdgpu_device *adev) ++static enum amd_reset_method ++soc15_asic_reset_method(struct amdgpu_device *adev) + { +- int ret; + bool baco_reset; + + switch (adev->asic_type) { ++ case CHIP_RAVEN: ++ return AMD_RESET_METHOD_MODE2; + case CHIP_VEGA10: + case CHIP_VEGA12: + soc15_asic_get_baco_capability(adev, &baco_reset); +@@ -493,6 +495,16 @@ static int soc15_asic_reset(struct amdgpu_device *adev) + } + + if (baco_reset) ++ return AMD_RESET_METHOD_BACO; ++ else ++ return AMD_RESET_METHOD_MODE1; ++} ++ ++static int soc15_asic_reset(struct amdgpu_device *adev) ++{ ++ int ret; ++ ++ if (soc15_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) + ret = soc15_asic_baco_reset(adev); + else + ret = soc15_asic_mode1_reset(adev); +@@ -806,6 +818,7 @@ static const struct amdgpu_asic_funcs soc15_asic_funcs = + .read_bios_from_rom = &soc15_read_bios_from_rom, + .read_register = &soc15_read_register, + .reset = &soc15_asic_reset, ++ .reset_method = &soc15_asic_reset_method, + .set_vga_state = &soc15_vga_set_state, + .get_xclk = &soc15_get_xclk, + .set_uvd_clocks = &soc15_set_uvd_clocks, +-- +2.17.1 + |