diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3125-drm-amd-display-enable-S-G-for-RAVEN-chip.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3125-drm-amd-display-enable-S-G-for-RAVEN-chip.patch | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3125-drm-amd-display-enable-S-G-for-RAVEN-chip.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3125-drm-amd-display-enable-S-G-for-RAVEN-chip.patch new file mode 100644 index 00000000..209e91e3 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3125-drm-amd-display-enable-S-G-for-RAVEN-chip.patch @@ -0,0 +1,55 @@ +From 8fbff19b7115fed1ffd9a4d2e012b229a9082a55 Mon Sep 17 00:00:00 2001 +From: Shirish S <shirish.s@amd.com> +Date: Tue, 16 Jul 2019 14:49:48 +0530 +Subject: [PATCH 3125/4256] drm/amd/display: enable S/G for RAVEN chip + +enables gpu_vm_support in dm and adds +AMDGPU_GEM_DOMAIN_GTT as supported domain + +v2: +Move BO placement logic into amdgpu_display_supported_domains + +v3: +Use amdgpu_bo_validate_uswc in amdgpu_display_supported_domains. + +v4: +amdgpu_bo_validate_uswc moved to sepperate patch. + +Change-Id: If34300beaa60be2d36170b7b5b096ec644502b20 +Signed-off-by: Shirish S <shirish.s@amd.com> +Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> +Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +index 86bb15f83dcc..f1df323f1da5 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +@@ -505,7 +505,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev) + * APUs. So force the BO placement to VRAM in case this architecture + * will not allow USWC mappings. + */ +- if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN && ++ if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type <= CHIP_RAVEN && + adev->flags & AMD_IS_APU && amdgpu_bo_support_uswc(0) && + amdgpu_device_asic_has_dc_support(adev->asic_type)) + domain |= AMDGPU_GEM_DOMAIN_GTT; +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 8d55650cb622..a21d46ecc886 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -686,7 +686,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) + */ + if (adev->flags & AMD_IS_APU && + adev->asic_type >= CHIP_CARRIZO && +- adev->asic_type < CHIP_RAVEN) ++ adev->asic_type <= CHIP_RAVEN) + init_data.flags.gpu_vm_support = true; + + if (amdgpu_dc_feature_mask & DC_FBC_MASK) +-- +2.17.1 + |