diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3078-drm-amd-display-Implement-DAL3-GPU-Integer-Scaling.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3078-drm-amd-display-Implement-DAL3-GPU-Integer-Scaling.patch | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3078-drm-amd-display-Implement-DAL3-GPU-Integer-Scaling.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3078-drm-amd-display-Implement-DAL3-GPU-Integer-Scaling.patch new file mode 100644 index 00000000..37093bae --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3078-drm-amd-display-Implement-DAL3-GPU-Integer-Scaling.patch @@ -0,0 +1,72 @@ +From 061134fb8b67e34cc7719560555e7f626e780896 Mon Sep 17 00:00:00 2001 +From: Reza Amini <Reza.Amini@amd.com> +Date: Mon, 10 Jun 2019 16:45:50 -0400 +Subject: [PATCH 3078/4256] drm/amd/display: Implement DAL3 GPU Integer Scaling + +[WHY] +Users want to not have filtering when scaling by integer +multiples to native timing. + +[HOW] +If timing is a multiple integer of view, we set number of taps +to 1 (effectivly closest neighbour). + +Signed-off-by: Reza Amini <Reza.Amini@amd.com> +Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +Acked-by: Tony Cheng <Tony.Cheng@amd.com> +--- + .../gpu/drm/amd/display/dc/core/dc_resource.c | 16 ++++++++++++++++ + drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 1 + + 2 files changed, 17 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +index b567b2159f1a..31a49c59c278 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +@@ -937,7 +937,14 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx) + data->inits.v_c_bot = dc_fixpt_add(data->inits.v_c, data->ratios.vert_c); + + } ++static bool are_rect_integer_multiples(struct rect src, struct rect dest) ++{ ++ if (dest.width >= src.width && dest.width % src.width == 0 && ++ dest.height >= src.height && dest.height % src.height == 0) ++ return true; + ++ return false; ++} + bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) + { + const struct dc_plane_state *plane_state = pipe_ctx->plane_state; +@@ -980,6 +987,15 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) + if (pipe_ctx->plane_res.dpp != NULL) + res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps( + pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); ++ ++ if (res && ++ plane_state->scaling_quality.integer_scaling && ++ are_rect_integer_multiples(pipe_ctx->plane_res.scl_data.viewport, ++ pipe_ctx->plane_res.scl_data.recout)) { ++ pipe_ctx->plane_res.scl_data.taps.v_taps = 1; ++ pipe_ctx->plane_res.scl_data.taps.h_taps = 1; ++ } ++ + if (!res) { + /* Try 24 bpp linebuffer */ + pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP; +diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h +index e9a6225f4720..28a2cd2d2a49 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h ++++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h +@@ -614,6 +614,7 @@ struct scaling_taps { + uint32_t h_taps; + uint32_t v_taps_c; + uint32_t h_taps_c; ++ bool integer_scaling; + }; + + enum dc_timing_standard { +-- +2.17.1 + |