diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3057-drm-amd-display-Implement-generic-MUX-registers.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3057-drm-amd-display-Implement-generic-MUX-registers.patch | 408 |
1 files changed, 408 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3057-drm-amd-display-Implement-generic-MUX-registers.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3057-drm-amd-display-Implement-generic-MUX-registers.patch new file mode 100644 index 00000000..c71e05d2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3057-drm-amd-display-Implement-generic-MUX-registers.patch @@ -0,0 +1,408 @@ +From 7de1bb6103448dfcc8adddfc4f4d3a9762b668e9 Mon Sep 17 00:00:00 2001 +From: Murton Liu <murton.liu@amd.com> +Date: Mon, 24 Jun 2019 11:28:06 -0400 +Subject: [PATCH 3057/4256] drm/amd/display: Implement generic MUX registers + +[Why] +Logic & structures for generic regs does not exist in DC currently. + +[How] +Implement register masks/shifts and relevant functions for generic mux, +similar to existing HPD and DDC objects. + +Signed-off-by: Murton Liu <murton.liu@amd.com> +Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> +Acked-by: Joshua Aberback <Joshua.Aberback@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/gpio/Makefile | 2 +- + .../display/dc/gpio/dcn20/hw_factory_dcn20.c | 41 +++++- + .../dc/gpio/diagnostics/hw_factory_diag.c | 1 + + .../drm/amd/display/dc/gpio/generic_regs.h | 66 +++++++++ + .../gpu/drm/amd/display/dc/gpio/hw_factory.h | 3 + + .../gpu/drm/amd/display/dc/gpio/hw_generic.c | 132 ++++++++++++++++++ + .../gpu/drm/amd/display/dc/gpio/hw_generic.h | 46 ++++++ + 7 files changed, 288 insertions(+), 3 deletions(-) + create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/generic_regs.h + create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c + create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.h + +diff --git a/drivers/gpu/drm/amd/display/dc/gpio/Makefile b/drivers/gpu/drm/amd/display/dc/gpio/Makefile +index c3d92878875d..113affea49bf 100644 +--- a/drivers/gpu/drm/amd/display/dc/gpio/Makefile ++++ b/drivers/gpu/drm/amd/display/dc/gpio/Makefile +@@ -24,7 +24,7 @@ + # It provides the control and status of HW GPIO pins. + + GPIO = gpio_base.o gpio_service.o hw_factory.o \ +- hw_gpio.o hw_hpd.o hw_ddc.o hw_translate.o ++ hw_gpio.o hw_hpd.o hw_ddc.o hw_generic.o hw_translate.o + + AMD_DAL_GPIO = $(addprefix $(AMDDALPATH)/dc/gpio/,$(GPIO)) + +diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c b/drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c +index abd76d855375..afb7c0f111bf 100644 +--- a/drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c ++++ b/drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c +@@ -31,6 +31,7 @@ + #include "../hw_gpio.h" + #include "../hw_ddc.h" + #include "../hw_hpd.h" ++#include "../hw_generic.h" + + #include "hw_factory_dcn20.h" + +@@ -138,6 +139,32 @@ static const struct ddc_sh_mask ddc_mask[] = { + DDC_MASK_SH_LIST_DCN2(_MASK, 6) + }; + ++#include "../generic_regs.h" ++ ++/* set field name */ ++#define SF_GENERIC(reg_name, field_name, post_fix)\ ++ .field_name = reg_name ## __ ## field_name ## post_fix ++ ++#define generic_regs(id) \ ++{\ ++ GENERIC_REG_LIST(id)\ ++} ++ ++static const struct generic_registers generic_regs[] = { ++ generic_regs(A), ++ generic_regs(B), ++}; ++ ++static const struct generic_sh_mask generic_shift[] = { ++ GENERIC_MASK_SH_LIST(__SHIFT, A), ++ GENERIC_MASK_SH_LIST(__SHIFT, B), ++}; ++ ++static const struct generic_sh_mask generic_mask[] = { ++ GENERIC_MASK_SH_LIST(_MASK, A), ++ GENERIC_MASK_SH_LIST(_MASK, B), ++}; ++ + static void define_ddc_registers( + struct hw_gpio_pin *pin, + uint32_t en) +@@ -173,17 +200,27 @@ static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) + hpd->base.regs = &hpd_regs[en].gpio; + } + ++static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) ++{ ++ struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin); ++ ++ generic->regs = &generic_regs[en]; ++ generic->shifts = &generic_shift[en]; ++ generic->masks = &generic_mask[en]; ++ generic->base.regs = &generic_regs[en].gpio; ++} + + /* fucntion table */ + static const struct hw_factory_funcs funcs = { + .create_ddc_data = dal_hw_ddc_create, + .create_ddc_clock = dal_hw_ddc_create, +- .create_generic = NULL, ++ .create_generic = dal_hw_generic_create, + .create_hpd = dal_hw_hpd_create, + .create_sync = NULL, + .create_gsl = NULL, + .define_hpd_registers = define_hpd_registers, +- .define_ddc_registers = define_ddc_registers ++ .define_ddc_registers = define_ddc_registers, ++ .define_generic_registers = define_generic_registers, + }; + /* + * dal_hw_factory_dcn10_init +diff --git a/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.c b/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.c +index 26695b963c58..f15288c3986e 100644 +--- a/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.c ++++ b/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.c +@@ -38,6 +38,7 @@ + #include "../hw_gpio.h" + #include "../hw_ddc.h" + #include "../hw_hpd.h" ++#include "../hw_generic.h" + + /* function table */ + static const struct hw_factory_funcs funcs = { +diff --git a/drivers/gpu/drm/amd/display/dc/gpio/generic_regs.h b/drivers/gpu/drm/amd/display/dc/gpio/generic_regs.h +new file mode 100644 +index 000000000000..8c05295c05c2 +--- /dev/null ++++ b/drivers/gpu/drm/amd/display/dc/gpio/generic_regs.h +@@ -0,0 +1,66 @@ ++/* ++ * Copyright 2012-16 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: AMD ++ * ++ */ ++ ++#ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_GENERIC_REGS_H_ ++#define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_GENERIC_REGS_H_ ++ ++#include "gpio_regs.h" ++ ++#define GENERIC_GPIO_REG_LIST_ENTRY(type, cd, id) \ ++ .type ## _reg = REG(DC_GPIO_GENERIC_## type),\ ++ .type ## _mask = DC_GPIO_GENERIC_ ## type ## __DC_GPIO_GENERIC ## id ## _ ## type ## _MASK,\ ++ .type ## _shift = DC_GPIO_GENERIC_ ## type ## __DC_GPIO_GENERIC ## id ## _ ## type ## __SHIFT ++ ++#define GENERIC_GPIO_REG_LIST(id) \ ++ {\ ++ GENERIC_GPIO_REG_LIST_ENTRY(MASK, cd, id),\ ++ GENERIC_GPIO_REG_LIST_ENTRY(A, cd, id),\ ++ GENERIC_GPIO_REG_LIST_ENTRY(EN, cd, id),\ ++ GENERIC_GPIO_REG_LIST_ENTRY(Y, cd, id)\ ++ } ++ ++#define GENERIC_REG_LIST(id) \ ++ GENERIC_GPIO_REG_LIST(id), \ ++ .mux = REG(DC_GENERIC ## id),\ ++ ++#define GENERIC_MASK_SH_LIST(mask_sh, cd) \ ++ {(DC_GENERIC ## cd ##__GENERIC ## cd ##_EN## mask_sh),\ ++ (DC_GENERIC ## cd ##__GENERIC ## cd ##_SEL## mask_sh)} ++ ++struct generic_registers { ++ struct gpio_registers gpio; ++ uint32_t mux; ++}; ++ ++struct generic_sh_mask { ++ /* enable */ ++ uint32_t GENERIC_EN; ++ /* select */ ++ uint32_t GENERIC_SEL; ++ ++}; ++ ++ ++#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_GENERIC_REGS_H_ */ +diff --git a/drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h b/drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h +index 6e4dd3521935..7017c9337348 100644 +--- a/drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h ++++ b/drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h +@@ -63,6 +63,9 @@ struct hw_factory { + void (*define_ddc_registers)( + struct hw_gpio_pin *pin, + uint32_t en); ++ void (*define_generic_registers)( ++ struct hw_gpio_pin *pin, ++ uint32_t en); + } *funcs; + }; + +diff --git a/drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c b/drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c +new file mode 100644 +index 000000000000..ea0a1fc8cf23 +--- /dev/null ++++ b/drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c +@@ -0,0 +1,132 @@ ++/* ++ * Copyright 2012-15 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: AMD ++ * ++ */ ++ ++#include "dm_services.h" ++ ++#include "include/gpio_types.h" ++#include "hw_gpio.h" ++#include "hw_generic.h" ++ ++#include "reg_helper.h" ++#include "generic_regs.h" ++ ++#undef FN ++#define FN(reg_name, field_name) \ ++ generic->shifts->field_name, generic->masks->field_name ++ ++#define CTX \ ++ generic->base.base.ctx ++#define REG(reg)\ ++ (generic->regs->reg) ++ ++static void dal_hw_generic_construct( ++ struct hw_generic *pin, ++ enum gpio_id id, ++ uint32_t en, ++ struct dc_context *ctx) ++{ ++ dal_hw_gpio_construct(&pin->base, id, en, ctx); ++} ++ ++static void dal_hw_generic_destruct( ++ struct hw_generic *pin) ++{ ++ dal_hw_gpio_destruct(&pin->base); ++} ++ ++static void destroy( ++ struct hw_gpio_pin **ptr) ++{ ++ struct hw_generic *generic = HW_GENERIC_FROM_BASE(*ptr); ++ ++ dal_hw_generic_destruct(generic); ++ ++ kfree(generic); ++ ++ *ptr = NULL; ++} ++ ++static enum gpio_result set_config( ++ struct hw_gpio_pin *ptr, ++ const struct gpio_config_data *config_data) ++{ ++ struct hw_generic *generic = HW_GENERIC_FROM_BASE(ptr); ++ ++ if (!config_data) ++ return GPIO_RESULT_INVALID_DATA; ++ ++ REG_UPDATE_2(mux, ++ GENERIC_EN, config_data->config.generic_mux.enable_output_from_mux, ++ GENERIC_SEL, config_data->config.generic_mux.mux_select); ++ ++ return GPIO_RESULT_OK; ++} ++ ++static const struct hw_gpio_pin_funcs funcs = { ++ .destroy = destroy, ++ .open = dal_hw_gpio_open, ++ .get_value = dal_hw_gpio_get_value, ++ .set_value = dal_hw_gpio_set_value, ++ .set_config = set_config, ++ .change_mode = dal_hw_gpio_change_mode, ++ .close = dal_hw_gpio_close, ++}; ++ ++static void construct( ++ struct hw_generic *generic, ++ enum gpio_id id, ++ uint32_t en, ++ struct dc_context *ctx) ++{ ++ dal_hw_generic_construct(generic, id, en, ctx); ++ generic->base.base.funcs = &funcs; ++} ++ ++struct hw_gpio_pin *dal_hw_generic_create( ++ struct dc_context *ctx, ++ enum gpio_id id, ++ uint32_t en) ++{ ++ struct hw_generic *generic; ++ ++ if (id != GPIO_ID_GENERIC) { ++ ASSERT_CRITICAL(false); ++ return NULL; ++ } ++ ++ if ((en < GPIO_GENERIC_MIN) || (en > GPIO_GENERIC_MAX)) { ++ ASSERT_CRITICAL(false); ++ return NULL; ++ } ++ ++ generic = kzalloc(sizeof(struct hw_generic), GFP_KERNEL); ++ if (!generic) { ++ ASSERT_CRITICAL(false); ++ return NULL; ++ } ++ ++ construct(generic, id, en, ctx); ++ return &generic->base.base; ++} +diff --git a/drivers/gpu/drm/amd/display/dc/gpio/hw_generic.h b/drivers/gpu/drm/amd/display/dc/gpio/hw_generic.h +new file mode 100644 +index 000000000000..3ea1c13e3ea6 +--- /dev/null ++++ b/drivers/gpu/drm/amd/display/dc/gpio/hw_generic.h +@@ -0,0 +1,46 @@ ++/* ++ * Copyright 2012-15 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: AMD ++ * ++ */ ++ ++#ifndef __DAL_HW_generic_H__ ++#define __DAL_HW_generic_H__ ++ ++#include "generic_regs.h" ++ ++struct hw_generic { ++ struct hw_gpio base; ++ const struct generic_registers *regs; ++ const struct generic_sh_mask *shifts; ++ const struct generic_sh_mask *masks; ++}; ++ ++#define HW_GENERIC_FROM_BASE(hw_gpio) \ ++ container_of((HW_GPIO_FROM_BASE(hw_gpio)), struct hw_generic, base) ++ ++struct hw_gpio_pin *dal_hw_generic_create( ++ struct dc_context *ctx, ++ enum gpio_id id, ++ uint32_t en); ++ ++#endif +-- +2.17.1 + |