diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3020-drm-amd-display-early-return-when-pipe_cnt-is-0-in-b.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3020-drm-amd-display-early-return-when-pipe_cnt-is-0-in-b.patch | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3020-drm-amd-display-early-return-when-pipe_cnt-is-0-in-b.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3020-drm-amd-display-early-return-when-pipe_cnt-is-0-in-b.patch new file mode 100644 index 00000000..e7e2f4d6 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3020-drm-amd-display-early-return-when-pipe_cnt-is-0-in-b.patch @@ -0,0 +1,71 @@ +From f216519d24cefc2f52f5a238da064fc5b6f14767 Mon Sep 17 00:00:00 2001 +From: Eric Yang <Eric.Yang2@amd.com> +Date: Tue, 4 Jun 2019 18:14:43 -0400 +Subject: [PATCH 3020/4256] drm/amd/display: early return when pipe_cnt is 0 in + bw validation + +[Why] +Unintentionally introduced behaviour change from previous refactor, +which causes clks to be 0 in no stream cases, which will cause +divide by 0. + +[How] +Skip calculation of clocks when no stream. Which is the same as old +behaviour. + +Signed-off-by: Eric Yang <Eric.Yang2@amd.com> +Reviewed-by: Tony Cheng <tong.cheng@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 +++++++- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h | 1 + + 2 files changed, 8 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index d07d35a9dd0a..022d0f38723b 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -2020,6 +2020,7 @@ bool dcn20_fast_validate_bw( + struct dc *dc, + struct dc_state *context, + display_e2e_pipe_params_st *pipes, ++ int *pipe_cnt_out, + int *pipe_split_from, + int *vlevel_out) + { +@@ -2072,6 +2073,8 @@ bool dcn20_fast_validate_bw( + pipe_cnt = dcn20_populate_dml_pipes_from_context(dc, + &context->res_ctx, pipes); + ++ *pipe_cnt_out = pipe_cnt; ++ + if (!pipe_cnt) { + out = true; + goto validate_out; +@@ -2432,7 +2435,10 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, + + BW_VAL_TRACE_COUNT(); + +- out = dcn20_fast_validate_bw(dc, context, pipes, pipe_split_from, &vlevel); ++ out = dcn20_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from, &vlevel); ++ ++ if (pipe_cnt == 0) ++ goto validate_out; + + if (!out) + goto validate_fail; +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h +index 2b3692e0c48d..44f95aa0d61e 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h +@@ -120,6 +120,7 @@ bool dcn20_fast_validate_bw( + struct dc *dc, + struct dc_state *context, + display_e2e_pipe_params_st *pipes, ++ int *pipe_cnt_out, + int *pipe_split_from, + int *vlevel_out); + void dcn20_calculate_dlg_params( +-- +2.17.1 + |