diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3016-drm-amd-display-cap-DCFCLK-hardmin-to-507-for-NV10.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3016-drm-amd-display-cap-DCFCLK-hardmin-to-507-for-NV10.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3016-drm-amd-display-cap-DCFCLK-hardmin-to-507-for-NV10.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3016-drm-amd-display-cap-DCFCLK-hardmin-to-507-for-NV10.patch new file mode 100644 index 00000000..be76afdc --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3016-drm-amd-display-cap-DCFCLK-hardmin-to-507-for-NV10.patch @@ -0,0 +1,39 @@ +From 46af0f46f380d9006ccb3f2fa3c0b7da8958bfa5 Mon Sep 17 00:00:00 2001 +From: Jun Lei <Jun.Lei@amd.com> +Date: Mon, 3 Jun 2019 11:37:44 -0400 +Subject: [PATCH 3016/4256] drm/amd/display: cap DCFCLK hardmin to 507 for NV10 + +[why] +Due to limitation in SMU/PPLIB, it is not possible to know Fmax @ Vmin for DCFCLK. +This causes issues at high display configurations where extra headroom of DCFCLK +can enable P-state switching + +[how] +Use existing override logic. If override not defined, then force +min = 507 + +Signed-off-by: Jun Lei <Jun.Lei@amd.com> +Reviewed-by: Eric Yang <eric.yang2@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index 842f48403226..d07d35a9dd0a 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -2704,6 +2704,10 @@ static void update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_ + + if (dc->bb_overrides.min_dcfclk_mhz > 0) + min_dcfclk = dc->bb_overrides.min_dcfclk_mhz; ++ else ++ // Accounting for SOC/DCF relationship, we can go as high as ++ // 506Mhz in Vmin. We need to code 507 since SMU will round down to 506. ++ min_dcfclk = 507; + + for (i = 0; i < num_states; i++) { + int min_fclk_required_by_uclk; +-- +2.17.1 + |