diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1715-drm-amdkfd-changes-introduced-in-kfd-merge-0486ab510.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1715-drm-amdkfd-changes-introduced-in-kfd-merge-0486ab510.patch | 237 |
1 files changed, 237 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1715-drm-amdkfd-changes-introduced-in-kfd-merge-0486ab510.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1715-drm-amdkfd-changes-introduced-in-kfd-merge-0486ab510.patch new file mode 100644 index 00000000..87687076 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1715-drm-amdkfd-changes-introduced-in-kfd-merge-0486ab510.patch @@ -0,0 +1,237 @@ +From 1316c8eea37ede2f5dbf95bf2f180bbf0d4b64d8 Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Thu, 22 Jun 2017 14:57:12 +0800 +Subject: [PATCH 1715/4131] drm/amdkfd: changes introduced in kfd merge + 0486ab510ea7144fc93e172ad91d80753bfd3441 + +Change-Id: Ic08818b597c27fdbe4f75add2d1d79fae43b15d9 +Signed-off-by: Evan Quan <evan.quan@amd.com> + + Conflicts: + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 ++ + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 7 +++--- + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c | 11 ++++----- + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 29 ++++++++++------------- + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 4 ++-- + 5 files changed, 24 insertions(+), 29 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +index 6446d8f..101c25d 100755 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +@@ -71,10 +71,12 @@ int amdgpu_amdkfd_init(void) + bool amdgpu_amdkfd_load_interface(struct amdgpu_device *adev) + { + switch (adev->asic_type) { ++#ifdef CONFIG_DRM_AMDGPU_CIK + case CHIP_KAVERI: + case CHIP_HAWAII: + kfd2kgd = amdgpu_amdkfd_gfx_7_get_functions(); + break; ++#endif + case CHIP_CARRIZO: + case CHIP_TONGA: + case CHIP_FIJI: +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c +index 9969b74..4549dc0 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c +@@ -32,6 +32,7 @@ + #include "cikd.h" + #include "cik_sdma.h" + #include "amdgpu_ucode.h" ++#include "gfx_v7_0.h" + #include "gca/gfx_7_2_d.h" + #include "gca/gfx_7_2_enum.h" + #include "gca/gfx_7_2_sh_mask.h" +@@ -41,8 +42,6 @@ + #include "gmc/gmc_7_1_sh_mask.h" + #include "cik_structs.h" + +-#define CIK_QUEUES_PER_PIPE_MEC (8) +- + #define AMDKFD_SKIP_UNCOMPILED_CODE 1 + + enum hqd_dequeue_request_type { +@@ -280,7 +279,7 @@ static void acquire_queue(struct kgd_dev *kgd, uint32_t pipe_id, + { + struct amdgpu_device *adev = get_amdgpu_device(kgd); + +- uint32_t mec = (++pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; ++ uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; + uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); + + lock_srbm(kgd, mec, pipe, queue_id, 0); +@@ -348,7 +347,7 @@ static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id) + uint32_t mec; + uint32_t pipe; + +- mec = (++pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; ++ mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; + pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); + + lock_srbm(kgd, mec, pipe, 0, 0); +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c +index ea11ac6..e319f80 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c +@@ -42,8 +42,6 @@ + #include "vi_structs.h" + #include "vid.h" + +-#define VI_QUEUES_PER_PIPE_MEC (8) +- + enum hqd_dequeue_request_type { + NO_ACTION = 0, + DRAIN_PIPE, +@@ -266,7 +264,7 @@ static void acquire_queue(struct kgd_dev *kgd, uint32_t pipe_id, + { + struct amdgpu_device *adev = get_amdgpu_device(kgd); + +- uint32_t mec = (++pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; ++ uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; + uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); + + lock_srbm(kgd, mec, pipe, queue_id, 0); +@@ -335,7 +333,7 @@ static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id) + uint32_t mec; + uint32_t pipe; + +- mec = (++pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; ++ mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; + pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); + + lock_srbm(kgd, mec, pipe, 0, 0); +@@ -386,8 +384,8 @@ static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, + if (m->cp_hqd_vmid == 0) { + uint32_t value, mec, pipe; + +- mec = (++pipe_id / VI_PIPE_PER_MEC) + 1; +- pipe = (pipe_id % VI_PIPE_PER_MEC); ++ mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; ++ pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); + + pr_debug("kfd: set HIQ, mec:%d, pipe:%d, queue:%d.\n", + mec, pipe, queue_id); +@@ -782,7 +780,6 @@ static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t pasid) + signed long r; + struct dma_fence *f; + struct amdgpu_ring *ring = &adev->gfx.kiq.ring; +- struct amdgpu_kiq *kiq = &adev->gfx.kiq; + + mutex_lock(&adev->gfx.kiq.ring_mutex); + amdgpu_ring_alloc(ring, 12); /* fence + invalidate_tlbs package*/ +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c +index e84c115..c06bf6b 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c +@@ -80,9 +80,6 @@ + #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_HI32 0x0728 + #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_HI32_BASE_IDX 0 + +-#define V9_PIPE_PER_MEC (4) +-#define V9_QUEUES_PER_PIPE_MEC (8) +- + enum hqd_dequeue_request_type { + NO_ACTION = 0, + DRAIN_PIPE, +@@ -309,18 +306,18 @@ static void unlock_srbm(struct kgd_dev *kgd) + static void acquire_queue(struct kgd_dev *kgd, uint32_t pipe_id, + uint32_t queue_id) + { +- uint32_t mec = (++pipe_id / V9_PIPE_PER_MEC) + 1; +- uint32_t pipe = (pipe_id % V9_PIPE_PER_MEC); ++ struct amdgpu_device *adev = get_amdgpu_device(kgd); ++ ++ uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; ++ uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); + + lock_srbm(kgd, mec, pipe, queue_id, 0); + } + +-static uint32_t get_queue_mask(uint32_t pipe_id, uint32_t queue_id) ++static uint32_t get_queue_mask(struct amdgpu_device *adev, ++ uint32_t pipe_id, uint32_t queue_id) + { +- /* assumes that pipe0 is used by graphics and that the correct +- * MEC is selected by acquire_queue already +- */ +- unsigned int bit = ((pipe_id+1) * V9_QUEUES_PER_PIPE_MEC + ++ unsigned int bit = (pipe_id * adev->gfx.mec.num_pipe_per_mec + + queue_id) & 31; + + return ((uint32_t)1) << bit; +@@ -408,6 +405,7 @@ static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid, + static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id, + uint32_t hpd_size, uint64_t hpd_gpu_addr) + { ++ /* amdgpu owns the per-pipe state */ + return 0; + } + +@@ -421,8 +419,8 @@ static int kgd_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id) + uint32_t mec; + uint32_t pipe; + +- mec = (++pipe_id / V9_PIPE_PER_MEC) + 1; +- pipe = (pipe_id % V9_PIPE_PER_MEC); ++ mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; ++ pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); + + lock_srbm(kgd, mec, pipe, 0, 0); + +@@ -491,8 +489,8 @@ static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, + if (m->cp_hqd_vmid == 0) { + uint32_t value, mec, pipe; + +- mec = (++pipe_id / V9_PIPE_PER_MEC) + 1; +- pipe = (pipe_id % V9_PIPE_PER_MEC); ++ mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; ++ pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); + + pr_debug("kfd: set HIQ, mec:%d, pipe:%d, queue:%d.\n", + mec, pipe, queue_id); +@@ -552,7 +550,7 @@ static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, + WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI), + upper_32_bits((uint64_t)wptr)); + WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_PQ_WPTR_POLL_CNTL1), +- get_queue_mask(pipe_id, queue_id)); ++ get_queue_mask(adev, pipe_id, queue_id)); + } + + /* Start the EOP fetcher */ +@@ -965,7 +963,6 @@ static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t pasid) + signed long r; + struct dma_fence *f; + struct amdgpu_ring *ring = &adev->gfx.kiq.ring; +- struct amdgpu_kiq *kiq = &adev->gfx.kiq; + + mutex_lock(&adev->gfx.kiq.ring_mutex); + amdgpu_ring_alloc(ring, 12); /* fence + invalidate_tlbs package*/ +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +index 3c65aaf..3a30505 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +@@ -870,7 +870,7 @@ static int reserve_bo_and_cond_vms(struct kgd_mem *mem, + static void unreserve_bo_and_vms(struct bo_vm_reservation_context *ctx, + bool wait) + { +- if (wait) ++ if (wait) /* FIXME: when called from user context, this needs to be interruptible */ + amdgpu_sync_wait(&ctx->sync, false); + + if (ctx->reserved) +@@ -936,7 +936,7 @@ static int update_gpuvm_pte(struct amdgpu_device *adev, + /* Update the page directory */ + ret = amdgpu_vm_update_directories(adev, vm); + if (ret != 0) { +- pr_err("amdgpu_vm_update_page_directory failed\n"); ++ pr_err("amdgpu_vm_update_directories failed\n"); + return ret; + } + +-- +2.7.4 + |