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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1434-drm-amdkfd-Reset-waves-when-dequeueing-HQD.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1434-drm-amdkfd-Reset-waves-when-dequeueing-HQD.patch264
1 files changed, 264 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1434-drm-amdkfd-Reset-waves-when-dequeueing-HQD.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1434-drm-amdkfd-Reset-waves-when-dequeueing-HQD.patch
new file mode 100644
index 00000000..ed78fa77
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1434-drm-amdkfd-Reset-waves-when-dequeueing-HQD.patch
@@ -0,0 +1,264 @@
+From 5b1351d417701a427dac684374ee1d1c3f4b46f2 Mon Sep 17 00:00:00 2001
+From: Yong Zhao <yong.zhao@amd.com>
+Date: Fri, 13 May 2016 19:10:52 -0400
+Subject: [PATCH 1434/4131] drm/amdkfd: Reset waves when dequeueing HQD
+
+In SW scheduler mode, DEQUEUE_REQ bit in CP_HQD_DEQUEUE_REQUEST
+should be set as 2 instead of 1 when dequeueing HQD.
+
+Meanwhile, when uninitializing a kernel queue, the incorrect value
+of a parameter in destoy_mqd() would lead to HQD not dequeued
+properly. It is fixed as well in the commit.
+
+Change-Id: I3d2813099f3a39397727eff1dc677539a99dc59d
+Signed-off-by: Yong Zhao <yong.zhao@amd.com>
+
+ Conflicts:
+ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
+ drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 27 ++++++++++++++++++---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c | 28 +++++++++++++++++++---
+ .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 4 ++--
+ .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 5 +++-
+ drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c | 2 +-
+ drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c | 2 +-
+ drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 8 -------
+ drivers/gpu/drm/amd/include/kgd_kfd_interface.h | 5 ++++
+ 8 files changed, 62 insertions(+), 19 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
+index 13f41e8..947a744 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
+@@ -41,6 +41,12 @@
+
+ #define AMDKFD_SKIP_UNCOMPILED_CODE 1
+
++enum hqd_dequeue_request_type {
++ NO_ACTION = 0,
++ DRAIN_PIPE,
++ RESET_WAVES
++};
++
+ enum {
+ MAX_TRAPID = 8, /* 3 bits in the bitfield. */
+ MAX_WATCH_ADDRESSES = 4
+@@ -103,7 +109,8 @@ static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd);
+ static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
+ uint32_t pipe_id, uint32_t queue_id);
+ static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd);
+-static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
++static int kgd_hqd_destroy(struct kgd_dev *kgd,
++ enum kfd_preempt_type reset_type,
+ unsigned int utimeout, uint32_t pipe_id,
+ uint32_t queue_id);
+ static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
+@@ -451,18 +458,32 @@ static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd)
+ return false;
+ }
+
+-static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
++static int kgd_hqd_destroy(struct kgd_dev *kgd,
++ enum kfd_preempt_type reset_type,
+ unsigned int utimeout, uint32_t pipe_id,
+ uint32_t queue_id)
+ {
+ struct amdgpu_device *adev = get_amdgpu_device(kgd);
+ uint32_t temp;
+ int timeout = utimeout;
++ enum hqd_dequeue_request_type type;
+
+ acquire_queue(kgd, pipe_id, queue_id);
+ WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, 0);
+
+- WREG32(mmCP_HQD_DEQUEUE_REQUEST, reset_type);
++ switch (reset_type) {
++ case KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN:
++ type = DRAIN_PIPE;
++ break;
++ case KFD_PREEMPT_TYPE_WAVEFRONT_RESET:
++ type = RESET_WAVES;
++ break;
++ default:
++ type = DRAIN_PIPE;
++ break;
++ }
++
++ WREG32(mmCP_HQD_DEQUEUE_REQUEST, type);
+
+ while (true) {
+ temp = RREG32(mmCP_HQD_ACTIVE);
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
+index 324b4eb..dc7d57d 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
+@@ -39,6 +39,13 @@
+ #include "vi_structs.h"
+ #include "vid.h"
+
++enum hqd_dequeue_request_type {
++ NO_ACTION = 0,
++ DRAIN_PIPE,
++ RESET_WAVES,
++ SAVE_WAVES
++};
++
+ static const uint32_t watchRegs[MAX_WATCH_ADDRESSES * ADDRESS_WATCH_REG_MAX] = {
+ mmTCP_WATCH0_ADDR_H, mmTCP_WATCH0_ADDR_L, mmTCP_WATCH0_CNTL,
+ mmTCP_WATCH1_ADDR_H, mmTCP_WATCH1_ADDR_L, mmTCP_WATCH1_CNTL,
+@@ -78,7 +85,8 @@ static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd);
+ static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
+ uint32_t pipe_id, uint32_t queue_id);
+ static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd);
+-static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
++static int kgd_hqd_destroy(struct kgd_dev *kgd,
++ enum kfd_preempt_type reset_type,
+ unsigned int utimeout, uint32_t pipe_id,
+ uint32_t queue_id);
+ static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
+@@ -467,17 +475,31 @@ static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd)
+ return false;
+ }
+
+-static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
++static int kgd_hqd_destroy(struct kgd_dev *kgd,
++ enum kfd_preempt_type reset_type,
+ unsigned int utimeout, uint32_t pipe_id,
+ uint32_t queue_id)
+ {
+ struct amdgpu_device *adev = get_amdgpu_device(kgd);
+ uint32_t temp;
+ int timeout = utimeout;
++ enum hqd_dequeue_request_type type;
+
+ acquire_queue(kgd, pipe_id, queue_id);
+
+- WREG32(mmCP_HQD_DEQUEUE_REQUEST, reset_type);
++ switch (reset_type) {
++ case KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN:
++ type = DRAIN_PIPE;
++ break;
++ case KFD_PREEMPT_TYPE_WAVEFRONT_RESET:
++ type = RESET_WAVES;
++ break;
++ default:
++ type = DRAIN_PIPE;
++ break;
++ }
++
++ WREG32(mmCP_HQD_DEQUEUE_REQUEST, type);
+
+ while (true) {
+ temp = RREG32(mmCP_HQD_ACTIVE);
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+index f92c01b..c8fd16c 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+@@ -350,7 +350,7 @@ static int destroy_queue_nocpsch(struct device_queue_manager *dqm,
+
+ retval = mqd->destroy_mqd(mqd, q->mqd,
+ KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
+- QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS,
++ KFD_HIQ_TIMEOUT,
+ q->pipe, q->queue);
+
+ if (retval != 0)
+@@ -1392,7 +1392,7 @@ static int process_termination_nocpsch(struct device_queue_manager *dqm,
+ dqm->total_queue_count--;
+ mqd->destroy_mqd(mqd, q->mqd,
+ KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
+- QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS,
++ KFD_HIQ_TIMEOUT,
+ q->pipe, q->queue);
+ mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
+ if (list_empty(&qpd->queues_list))
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
+index 22bc0b7..97a739a 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
+@@ -29,7 +29,10 @@
+ #include "kfd_priv.h"
+ #include "kfd_mqd_manager.h"
+
+-#define QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS (9000)
++#define KFD_HIQ_TIMEOUT (500)
++#define KFD_UNMAP_LATENCY_MS (4000)
++#define QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS (2 * KFD_UNMAP_LATENCY_MS + 1000)
++
+ #define KFD_DQM_FIRST_PIPE (0)
+ #define CIK_SDMA_QUEUES (4)
+ #define CIK_SDMA_QUEUES_PER_ENGINE (2)
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
+index fbee118..fc4d8b2 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
+@@ -185,7 +185,7 @@ static void uninitialize(struct kernel_queue *kq)
+ if (kq->queue->properties.type == KFD_QUEUE_TYPE_HIQ)
+ kq->mqd->destroy_mqd(kq->mqd,
+ NULL,
+- false,
++ KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
+ QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS,
+ kq->queue->pipe,
+ kq->queue->queue);
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
+index 92102fc..849df1b 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
+@@ -634,7 +634,7 @@ int pm_send_set_resources(struct packet_manager *pm,
+ packet->bitfields2.queue_type =
+ queue_type__mes_set_resources__hsa_interface_queue_hiq;
+ packet->bitfields2.vmid_mask = res->vmid_mask;
+- packet->bitfields2.unmap_latency = KFD_UNMAP_LATENCY;
++ packet->bitfields2.unmap_latency = KFD_UNMAP_LATENCY_MS / 100;
+ packet->bitfields7.oac_mask = res->oac_mask;
+ packet->bitfields8.gds_heap_base = res->gds_heap_base;
+ packet->bitfields8.gds_heap_size = res->gds_heap_size;
+diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+index f77be33..49da7ef 100644
+--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
++++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+@@ -316,11 +316,6 @@ enum kfd_unmap_queues_filter {
+ KFD_UNMAP_QUEUES_FILTER_BY_PASID
+ };
+
+-enum kfd_preempt_type {
+- KFD_PREEMPT_TYPE_WAVEFRONT,
+- KFD_PREEMPT_TYPE_WAVEFRONT_RESET
+-};
+-
+ /**
+ * enum kfd_queue_type
+ *
+@@ -816,11 +811,8 @@ int kgd2kfd_resume_mm(struct kfd_dev *kfd, struct mm_struct *mm);
+
+ /* Packet Manager */
+
+-#define KFD_HIQ_TIMEOUT (500)
+-
+ #define KFD_FENCE_COMPLETED (100)
+ #define KFD_FENCE_INIT (10)
+-#define KFD_UNMAP_LATENCY (40)
+
+ struct packet_manager_firmware;
+
+diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
+index 5403164..3142551 100644
+--- a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
++++ b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
+@@ -43,6 +43,11 @@ struct kgd_mem;
+ struct kfd_process_device;
+ struct amdgpu_bo;
+
++enum kfd_preempt_type {
++ KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN = 0,
++ KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
++};
++
+ struct kfd_vm_fault_info {
+ uint64_t page_addr;
+ uint32_t vmid;
+--
+2.7.4
+