diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1029-drm-amd-display-Program-reg-for-vertical-interrupt.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1029-drm-amd-display-Program-reg-for-vertical-interrupt.patch | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1029-drm-amd-display-Program-reg-for-vertical-interrupt.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1029-drm-amd-display-Program-reg-for-vertical-interrupt.patch new file mode 100644 index 00000000..ecc57c75 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1029-drm-amd-display-Program-reg-for-vertical-interrupt.patch @@ -0,0 +1,89 @@ +From 4a34809035746d9a7bea69f7435b60e9565bb683 Mon Sep 17 00:00:00 2001 +From: Yongqiang Sun <yongqiang.sun@amd.com> +Date: Tue, 29 Aug 2017 12:50:21 -0400 +Subject: [PATCH 1029/4131] drm/amd/display: Program reg for vertical + interrupt. + +Change-Id: Iedc229c5bb753ad64819ffb1bbea1909764e46db +Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <Harry.Wentland@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c | 10 ++++++++++ + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h | 4 ++++ + 2 files changed, 14 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c +index 6a5f268..94ea3a9 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c +@@ -118,6 +118,7 @@ static void tgn10_program_timing( + uint32_t start_point = 0; + uint32_t field_num = 0; + uint32_t h_div_2; ++ uint32_t vertial_line_start; + + struct dcn10_timing_generator *tgn10 = DCN10TG_FROM_TG(tg); + +@@ -212,6 +213,12 @@ static void tgn10_program_timing( + OTG_V_BLANK_START, asic_blank_start, + OTG_V_BLANK_END, asic_blank_end); + ++ /* Use OTG_VERTICAL_INTERRUPT2 replace VUPDATE interrupt, ++ * program the reg for interrupt postition. ++ */ ++ vertial_line_start = asic_blank_end - tg->dlg_otg_param.vstartup_start + 1; ++ REG_SET(OTG_VERTICAL_INTERRUPT2_POSITION, 0, ++ OTG_VERTICAL_INTERRUPT2_LINE_START, vertial_line_start); + + /* v_sync polarity */ + v_sync_polarity = patched_crtc_timing.flags.VSYNC_POSITIVE_POLARITY ? +@@ -289,6 +296,9 @@ static void tgn10_unblank_crtc(struct timing_generator *tg) + { + struct dcn10_timing_generator *tgn10 = DCN10TG_FROM_TG(tg); + ++ REG_UPDATE(OTG_DOUBLE_BUFFER_CONTROL, ++ OTG_BLANK_DATA_DOUBLE_BUFFER_EN, 1); ++ + REG_UPDATE_2(OTG_BLANK_CONTROL, + OTG_BLANK_DATA_EN, 0, + OTG_BLANK_DE_MODE, 0); +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h +index 6548893..38d3dcf 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h +@@ -65,6 +65,7 @@ + SRI(OTG_NOM_VERT_POSITION, OTG, inst),\ + SRI(OTG_BLACK_COLOR, OTG, inst),\ + SRI(OTG_CLOCK_CONTROL, OTG, inst),\ ++ SRI(OTG_VERTICAL_INTERRUPT2_POSITION, OTG, inst),\ + SRI(OPTC_INPUT_CLOCK_CONTROL, ODM, inst),\ + SRI(OPTC_DATA_SOURCE_SELECT, ODM, inst),\ + SRI(OPTC_INPUT_GLOBAL_CONTROL, ODM, inst),\ +@@ -120,6 +121,7 @@ struct dcn_tg_registers { + uint32_t OTG_TEST_PATTERN_CONTROL; + uint32_t OTG_TEST_PATTERN_COLOR; + uint32_t OTG_CLOCK_CONTROL; ++ uint32_t OTG_VERTICAL_INTERRUPT2_POSITION; + uint32_t OPTC_INPUT_CLOCK_CONTROL; + uint32_t OPTC_DATA_SOURCE_SELECT; + uint32_t OPTC_INPUT_GLOBAL_CONTROL; +@@ -203,6 +205,7 @@ struct dcn_tg_registers { + SF(OTG0_OTG_CLOCK_CONTROL, OTG_CLOCK_EN, mask_sh),\ + SF(OTG0_OTG_CLOCK_CONTROL, OTG_CLOCK_ON, mask_sh),\ + SF(OTG0_OTG_CLOCK_CONTROL, OTG_CLOCK_GATE_DIS, mask_sh),\ ++ SF(OTG0_OTG_VERTICAL_INTERRUPT2_POSITION, OTG_VERTICAL_INTERRUPT2_LINE_START, mask_sh),\ + SF(ODM0_OPTC_INPUT_CLOCK_CONTROL, OPTC_INPUT_CLK_EN, mask_sh),\ + SF(ODM0_OPTC_INPUT_CLOCK_CONTROL, OPTC_INPUT_CLK_ON, mask_sh),\ + SF(ODM0_OPTC_INPUT_CLOCK_CONTROL, OPTC_INPUT_CLK_GATE_DIS, mask_sh),\ +@@ -308,6 +311,7 @@ struct dcn_tg_registers { + type OTG_CLOCK_EN;\ + type OTG_CLOCK_ON;\ + type OTG_CLOCK_GATE_DIS;\ ++ type OTG_VERTICAL_INTERRUPT2_LINE_START;\ + type OPTC_INPUT_CLK_EN;\ + type OPTC_INPUT_CLK_ON;\ + type OPTC_INPUT_CLK_GATE_DIS;\ +-- +2.7.4 + |