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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0990-drm-amd-display-Fixed-mpc-add-enable-always-scaler-f.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0990-drm-amd-display-Fixed-mpc-add-enable-always-scaler-f.patch49
1 files changed, 49 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0990-drm-amd-display-Fixed-mpc-add-enable-always-scaler-f.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0990-drm-amd-display-Fixed-mpc-add-enable-always-scaler-f.patch
new file mode 100644
index 00000000..fb0a0383
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0990-drm-amd-display-Fixed-mpc-add-enable-always-scaler-f.patch
@@ -0,0 +1,49 @@
+From 837dd6f478f682226da1349fbe3ec03c9e812c4e Mon Sep 17 00:00:00 2001
+From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
+Date: Fri, 28 Jul 2017 08:16:27 -0400
+Subject: [PATCH 0990/4131] drm/amd/display: Fixed mpc add, enable always
+ scaler for video surface.
+
+Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Harry Wentland <Harry.Wentland@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 6 +++---
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 4 ++++
+ 2 files changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
+index 52f2f2d..ce408cc 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
+@@ -229,9 +229,9 @@ static void mpc10_mpcc_add(struct mpc *mpc, struct mpcc_cfg *cfg)
+ mpc10_set_bg_color(mpc10, &cfg->black_color, mpcc_id);
+
+ mpc10->mpcc_in_use_mask |= 1 << mpcc_id;
+- for (z_idx = cfg->z_index; z_idx < cfg->opp->mpc_tree.num_pipes; z_idx++) {
+- cfg->opp->mpc_tree.dpp[z_idx + 1] = cfg->opp->mpc_tree.dpp[z_idx];
+- cfg->opp->mpc_tree.mpcc[z_idx + 1] = cfg->opp->mpc_tree.mpcc[z_idx];
++ for (z_idx = cfg->opp->mpc_tree.num_pipes; z_idx > cfg->z_index; z_idx--) {
++ cfg->opp->mpc_tree.dpp[z_idx] = cfg->opp->mpc_tree.dpp[z_idx - 1];
++ cfg->opp->mpc_tree.mpcc[z_idx] = cfg->opp->mpc_tree.mpcc[z_idx - 1];
+ }
+ cfg->opp->mpc_tree.dpp[cfg->z_index] = cfg->mi->inst;
+ cfg->opp->mpc_tree.mpcc[cfg->z_index] = mpcc_id;
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+index ee43cbc..9c7ec04 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+@@ -422,6 +422,10 @@ static const struct dc_debug debug_defaults_drv = {
+ .force_abm_enable = false,
+ .timing_trace = false,
+ .clock_trace = true,
++ /* spread sheet doesn't handle taps_c is one properly,
++ * need to enable scaler for video surface to pass
++ * bandwidth validation.*/
++ .always_scale = true,
+ .disable_pplib_clock_request = true,
+ .disable_pplib_wm_range = false,
+ #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
+--
+2.7.4
+