diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0748-drm-amd-display-fix-HDMI-12bits-last-two-bits-are-ze.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0748-drm-amd-display-fix-HDMI-12bits-last-two-bits-are-ze.patch | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0748-drm-amd-display-fix-HDMI-12bits-last-two-bits-are-ze.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0748-drm-amd-display-fix-HDMI-12bits-last-two-bits-are-ze.patch new file mode 100644 index 00000000..b2bc4501 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0748-drm-amd-display-fix-HDMI-12bits-last-two-bits-are-ze.patch @@ -0,0 +1,72 @@ +From de39804978efce84f63fb980a5680dfe68b9f642 Mon Sep 17 00:00:00 2001 +From: Corbin McElhanney <corbin.mcelhanney@amd.com> +Date: Thu, 3 Aug 2017 14:20:14 -0400 +Subject: [PATCH 0748/4131] drm/amd/display: fix HDMI 12bits last two bits are + zero issue + +(FF-158) -[FF N-1] HDMI Deep Color Mode incorrect bit depth: +FMT_DYNAMIC_EXP_EN is being reset to 0 + +Signed-off-by: Charlene Liu <charlene.liu@amd.com> +Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Acked-by: Harry Wentland <Harry.Wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 17 +++++++++++------ + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c | 3 ++- + 2 files changed, 13 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +index 5992572..c29e514 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +@@ -1044,14 +1044,14 @@ static enum dc_status apply_single_controller_ctx_to_hw( + /* */ + dc->hwss.prog_pixclk_crtc_otg(pipe_ctx, context, dc); + +- pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion( +- pipe_ctx->stream_res.opp, +- COLOR_SPACE_YCBCR601, +- stream->timing.display_color_depth, +- pipe_ctx->stream->signal); +- + /* FPGA does not program backend */ + if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { ++ pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion( ++ pipe_ctx->stream_res.opp, ++ COLOR_SPACE_YCBCR601, ++ stream->timing.display_color_depth, ++ pipe_ctx->stream->signal); ++ + pipe_ctx->stream_res.opp->funcs->opp_program_fmt( + pipe_ctx->stream_res.opp, + &stream->bit_depth_params, +@@ -1064,6 +1064,11 @@ static enum dc_status apply_single_controller_ctx_to_hw( + BREAK_TO_DEBUGGER(); + return DC_ERROR_UNEXPECTED; + } ++ pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion( ++ pipe_ctx->stream_res.opp, ++ COLOR_SPACE_YCBCR601, ++ stream->timing.display_color_depth, ++ pipe_ctx->stream->signal); + + if (pipe_ctx->stream->signal != SIGNAL_TYPE_VIRTUAL) + stream->sink->link->link_enc->funcs->setup( +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c +index 38d15f7..8048782 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c +@@ -240,7 +240,8 @@ static void oppn10_set_dyn_expansion( + /*01 - 8-bit -> 12-bit dynamic expansion*/ + if (signal == SIGNAL_TYPE_HDMI_TYPE_A || + signal == SIGNAL_TYPE_DISPLAY_PORT || +- signal == SIGNAL_TYPE_DISPLAY_PORT_MST) { ++ signal == SIGNAL_TYPE_DISPLAY_PORT_MST || ++ signal == SIGNAL_TYPE_VIRTUAL) { + switch (color_dpth) { + case COLOR_DEPTH_888: + REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, +-- +2.7.4 + |