diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0305-drm-amd-display-voltage-request-related-change.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0305-drm-amd-display-voltage-request-related-change.patch | 162 |
1 files changed, 162 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0305-drm-amd-display-voltage-request-related-change.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0305-drm-amd-display-voltage-request-related-change.patch new file mode 100644 index 00000000..cb2e7e45 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0305-drm-amd-display-voltage-request-related-change.patch @@ -0,0 +1,162 @@ +From 73631db5578b7f7889c62c3f9235501f15b003f7 Mon Sep 17 00:00:00 2001 +From: Charlene Liu <charlene.liu@amd.com> +Date: Fri, 24 Mar 2017 16:54:02 -0400 +Subject: [PATCH 0305/4131] drm/amd/display: voltage request related change + +Signed-off-by: Charlene Liu <charlene.liu@amd.com> +Acked-by: Harry Wentland <Harry.Wentland@amd.com> +Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../gpu/drm/amd/display/dc/dce/dce_clock_source.c | 1 + + drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c | 27 +++++++++++----------- + .../gpu/drm/amd/display/dc/inc/hw/display_clock.h | 2 ++ + drivers/gpu/drm/amd/display/include/logger_types.h | 1 + + 4 files changed, 18 insertions(+), 13 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +index bd4524e..8ddad3a 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +@@ -1035,6 +1035,7 @@ static void get_ss_info_from_atombios( + } + + *spread_spectrum_data = ss_data; ++ dm_free(ss_data); + dm_free(ss_info); + return; + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c +index 263f890..b4fd022 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c +@@ -495,6 +495,7 @@ static void dce_clock_read_ss_info(struct dce_disp_clk *clk_dce) + } + } + ++ + static bool dce_apply_clock_voltage_request( + struct display_clock *clk, + enum dm_pp_clock_type clocks_type, +@@ -502,6 +503,7 @@ static bool dce_apply_clock_voltage_request( + bool pre_mode_set, + bool update_dp_phyclk) + { ++ bool send_request = false; + struct dm_pp_clock_for_voltage_req clock_voltage_req = {0}; + + switch (clocks_type) { +@@ -522,9 +524,8 @@ static bool dce_apply_clock_voltage_request( + switch (clocks_type) { + case DM_PP_CLOCK_TYPE_DISPLAY_CLK: + if (clocks_in_khz > clk->cur_clocks_value.dispclk_in_khz) { +- dm_pp_apply_clock_for_voltage_request( +- clk->ctx, &clock_voltage_req); + clk->cur_clocks_value.dispclk_notify_pplib_done = true; ++ send_request = true; + } else + clk->cur_clocks_value.dispclk_notify_pplib_done = false; + /* no matter incrase or decrase clock, update current clock value */ +@@ -532,9 +533,8 @@ static bool dce_apply_clock_voltage_request( + break; + case DM_PP_CLOCK_TYPE_PIXELCLK: + if (clocks_in_khz > clk->cur_clocks_value.max_pixelclk_in_khz) { +- dm_pp_apply_clock_for_voltage_request( +- clk->ctx, &clock_voltage_req); + clk->cur_clocks_value.pixelclk_notify_pplib_done = true; ++ send_request = true; + } else + clk->cur_clocks_value.pixelclk_notify_pplib_done = false; + /* no matter incrase or decrase clock, update current clock value */ +@@ -542,9 +542,8 @@ static bool dce_apply_clock_voltage_request( + break; + case DM_PP_CLOCK_TYPE_DISPLAYPHYCLK: + if (clocks_in_khz > clk->cur_clocks_value.max_non_dp_phyclk_in_khz) { +- dm_pp_apply_clock_for_voltage_request( +- clk->ctx, &clock_voltage_req); + clk->cur_clocks_value.phyclk_notigy_pplib_done = true; ++ send_request = true; + } else + clk->cur_clocks_value.phyclk_notigy_pplib_done = false; + /* no matter incrase or decrase clock, update current clock value */ +@@ -554,29 +553,30 @@ static bool dce_apply_clock_voltage_request( + ASSERT(0); + break; + } ++ + } else { + switch (clocks_type) { + case DM_PP_CLOCK_TYPE_DISPLAY_CLK: + if (!clk->cur_clocks_value.dispclk_notify_pplib_done) +- dm_pp_apply_clock_for_voltage_request( +- clk->ctx, &clock_voltage_req); ++ send_request = true; + break; + case DM_PP_CLOCK_TYPE_PIXELCLK: + if (!clk->cur_clocks_value.pixelclk_notify_pplib_done) +- dm_pp_apply_clock_for_voltage_request( +- clk->ctx, &clock_voltage_req); ++ send_request = true; + break; + case DM_PP_CLOCK_TYPE_DISPLAYPHYCLK: + if (!clk->cur_clocks_value.phyclk_notigy_pplib_done) +- dm_pp_apply_clock_for_voltage_request( +- clk->ctx, &clock_voltage_req); ++ send_request = true; + break; + default: + ASSERT(0); + break; + } + } +- ++ if (send_request) { ++ dm_pp_apply_clock_for_voltage_request( ++ clk->ctx, &clock_voltage_req); ++ } + if (update_dp_phyclk && (clocks_in_khz > + clk->cur_clocks_value.max_dp_phyclk_in_khz)) + clk->cur_clocks_value.max_dp_phyclk_in_khz = clocks_in_khz; +@@ -584,6 +584,7 @@ static bool dce_apply_clock_voltage_request( + return true; + } + ++ + static const struct display_clock_funcs dce120_funcs = { + .get_dp_ref_clk_frequency = dce_clocks_get_dp_ref_freq, + .apply_clock_voltage_request = dce_apply_clock_voltage_request, +diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/display_clock.h b/drivers/gpu/drm/amd/display/dc/inc/hw/display_clock.h +index 79aa75c..97f26b5 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/hw/display_clock.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/display_clock.h +@@ -28,6 +28,7 @@ + + #include "dm_services_types.h" + ++ + struct clocks_value { + int dispclk_in_khz; + int max_pixelclk_in_khz; +@@ -38,6 +39,7 @@ struct clocks_value { + bool phyclk_notigy_pplib_done; + }; + ++ + /* Structure containing all state-dependent clocks + * (dependent on "enum clocks_state") */ + struct state_dependent_clocks { +diff --git a/drivers/gpu/drm/amd/display/include/logger_types.h b/drivers/gpu/drm/amd/display/include/logger_types.h +index 982c67f..dfc0f10 100644 +--- a/drivers/gpu/drm/amd/display/include/logger_types.h ++++ b/drivers/gpu/drm/amd/display/include/logger_types.h +@@ -64,6 +64,7 @@ enum dc_log_type { + LOG_EVENT_UNDERFLOW, + LOG_IF_TRACE, + LOG_HW_MARKS, ++ LOG_PPLIB, + + LOG_SECTION_TOTAL_COUNT + }; +-- +2.7.4 + |