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-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0170-drm-amd-display-Proper-de-allocation-of-OPP.patch185
1 files changed, 185 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0170-drm-amd-display-Proper-de-allocation-of-OPP.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0170-drm-amd-display-Proper-de-allocation-of-OPP.patch
new file mode 100644
index 00000000..7957538d
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0170-drm-amd-display-Proper-de-allocation-of-OPP.patch
@@ -0,0 +1,185 @@
+From 100e92a618ad00a6f2793dbabe33de38d84b58c3 Mon Sep 17 00:00:00 2001
+From: Joshua Aberback <Joshua.Aberback@amd.com>
+Date: Tue, 17 Jan 2017 16:01:35 -0500
+Subject: [PATCH 0170/4131] drm/amd/display: Proper de-allocation of OPP
+
+- refactor opp_destroy functions to dce common file
+ - fixes memory leak, dce specific variations didn't free regamma_params
+- remove unused dce110_regamma structure
+
+Signed-off-by: Joshua Aberback <Joshua.Aberback@amd.com>
+Reviewed-by: Jun Lei <Jun.Lei@amd.com>
+Acked-by: Harry Wentland <Harry.Wentland@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dce/dce_opp.c | 10 ++++---
+ drivers/gpu/drm/amd/display/dc/dce/dce_opp.h | 35 ----------------------
+ .../drm/amd/display/dc/dce100/dce100_resource.c | 26 +---------------
+ .../drm/amd/display/dc/dce112/dce112_resource.c | 26 +---------------
+ 4 files changed, 8 insertions(+), 89 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c
+index 061de9e..62f0191 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c
++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c
+@@ -986,10 +986,12 @@ bool dce110_opp_construct(struct dce110_opp *opp110,
+
+ void dce110_opp_destroy(struct output_pixel_processor **opp)
+ {
+- dm_free((*opp)->regamma_params);
+- (*opp)->regamma_params = NULL;
+-
+- dm_free(FROM_DCE11_OPP(*opp));
++ if (*opp) {
++ if ((*opp)->regamma_params)
++ dm_free((*opp)->regamma_params);
++ (*opp)->regamma_params = NULL;
++ dm_free(FROM_DCE11_OPP(*opp));
++ }
+ *opp = NULL;
+ }
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h
+index f2828f0..a5afc02 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h
++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h
+@@ -312,40 +312,6 @@ struct dce_opp_registers {
+ uint32_t FMT_CLAMP_COMPONENT_B;
+ };
+
+-struct dce110_regamma {
+- struct gamma_curve arr_curve_points[16];
+- struct curve_points arr_points[3];
+- uint32_t hw_points_num;
+- struct hw_x_point *coordinates_x;
+- struct pwl_result_data *rgb_resulted;
+-
+- /* re-gamma curve */
+- struct pwl_float_data_ex *rgb_regamma;
+- /* coeff used to map user evenly distributed points
+- * to our hardware points (predefined) for gamma 256 */
+- struct pixel_gamma_point *coeff128;
+- struct pixel_gamma_point *coeff128_oem;
+- /* coeff used to map user evenly distributed points
+- * to our hardware points (predefined) for gamma 1025 */
+- struct pixel_gamma_point *coeff128_dx;
+- /* evenly distributed points, gamma 256 software points 0-255 */
+- struct gamma_pixel *axis_x_256;
+- /* evenly distributed points, gamma 1025 software points 0-1025 */
+- struct gamma_pixel *axis_x_1025;
+- /* OEM supplied gamma for regamma LUT */
+- struct pwl_float_data *rgb_oem;
+- /* user supplied gamma */
+- struct pwl_float_data *rgb_user;
+- uint32_t extra_points;
+- bool use_half_points;
+- struct fixed31_32 x_max1;
+- struct fixed31_32 x_max2;
+- struct fixed31_32 x_min;
+- struct fixed31_32 divider1;
+- struct fixed31_32 divider2;
+- struct fixed31_32 divider3;
+-};
+-
+ /* OPP RELATED */
+ #define TO_DCE110_OPP(opp)\
+ container_of(opp, struct dce110_opp, base)
+@@ -355,7 +321,6 @@ struct dce110_opp {
+ const struct dce_opp_registers *regs;
+ const struct dce_opp_shift *opp_shift;
+ const struct dce_opp_mask *opp_mask;
+- struct dce110_regamma regamma;
+ };
+
+ bool dce110_opp_construct(struct dce110_opp *opp110,
+diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
+index dc4f270..6ae334b 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
+@@ -633,30 +633,6 @@ struct output_pixel_processor *dce100_opp_create(
+ return NULL;
+ }
+
+-void dce100_opp_destroy(struct output_pixel_processor **opp)
+-{
+- struct dce110_opp *dce110_opp;
+-
+- if (!opp || !*opp)
+- return;
+-
+- dce110_opp = FROM_DCE11_OPP(*opp);
+-
+- dm_free(dce110_opp->regamma.coeff128_dx);
+- dm_free(dce110_opp->regamma.coeff128_oem);
+- dm_free(dce110_opp->regamma.coeff128);
+- dm_free(dce110_opp->regamma.axis_x_1025);
+- dm_free(dce110_opp->regamma.axis_x_256);
+- dm_free(dce110_opp->regamma.coordinates_x);
+- dm_free(dce110_opp->regamma.rgb_regamma);
+- dm_free(dce110_opp->regamma.rgb_resulted);
+- dm_free(dce110_opp->regamma.rgb_oem);
+- dm_free(dce110_opp->regamma.rgb_user);
+- dm_free(dce110_opp);
+-
+- *opp = NULL;
+-}
+-
+ struct clock_source *dce100_clock_source_create(
+ struct dc_context *ctx,
+ struct dc_bios *bios,
+@@ -692,7 +668,7 @@ static void destruct(struct dce110_resource_pool *pool)
+
+ for (i = 0; i < pool->base.pipe_count; i++) {
+ if (pool->base.opps[i] != NULL)
+- dce100_opp_destroy(&pool->base.opps[i]);
++ dce110_opp_destroy(&pool->base.opps[i]);
+
+ if (pool->base.transforms[i] != NULL)
+ dce100_transform_destroy(&pool->base.transforms[i]);
+diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
+index 7c12185b..cc826ef 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
+@@ -645,30 +645,6 @@ struct output_pixel_processor *dce112_opp_create(
+ return NULL;
+ }
+
+-void dce112_opp_destroy(struct output_pixel_processor **opp)
+-{
+- struct dce110_opp *dce110_opp;
+-
+- if (!opp || !*opp)
+- return;
+-
+- dce110_opp = FROM_DCE11_OPP(*opp);
+-
+- dm_free(dce110_opp->regamma.coeff128_dx);
+- dm_free(dce110_opp->regamma.coeff128_oem);
+- dm_free(dce110_opp->regamma.coeff128);
+- dm_free(dce110_opp->regamma.axis_x_1025);
+- dm_free(dce110_opp->regamma.axis_x_256);
+- dm_free(dce110_opp->regamma.coordinates_x);
+- dm_free(dce110_opp->regamma.rgb_regamma);
+- dm_free(dce110_opp->regamma.rgb_resulted);
+- dm_free(dce110_opp->regamma.rgb_oem);
+- dm_free(dce110_opp->regamma.rgb_user);
+-
+- dm_free(dce110_opp);
+- *opp = NULL;
+-}
+-
+ struct clock_source *dce112_clock_source_create(
+ struct dc_context *ctx,
+ struct dc_bios *bios,
+@@ -704,7 +680,7 @@ static void destruct(struct dce110_resource_pool *pool)
+
+ for (i = 0; i < pool->base.pipe_count; i++) {
+ if (pool->base.opps[i] != NULL)
+- dce112_opp_destroy(&pool->base.opps[i]);
++ dce110_opp_destroy(&pool->base.opps[i]);
+
+ if (pool->base.transforms[i] != NULL)
+ dce112_transform_destroy(&pool->base.transforms[i]);
+--
+2.7.4
+