diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0095-eMMC-patch-4.14.48.patch')
| -rwxr-xr-x | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0095-eMMC-patch-4.14.48.patch | 219 |
1 files changed, 219 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0095-eMMC-patch-4.14.48.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0095-eMMC-patch-4.14.48.patch new file mode 100755 index 00000000..9278cd7e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0095-eMMC-patch-4.14.48.patch @@ -0,0 +1,219 @@ +From 83800ff77e4b8d8946ed9d33229e57cb3fc58cbc Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Thu, 16 Aug 2018 22:52:11 +0530 +Subject: [PATCH 95/95] eMMC patch 4.14.48 + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/acpi/resource.c | 5 +++++ + drivers/mmc/core/mmc.c | 25 +++++++++++++++---------- + drivers/mmc/host/sdhci-acpi.c | 2 ++ + drivers/mmc/host/sdhci.c | 21 +++++++++++++++++++++ + drivers/mmc/host/sdhci.h | 2 ++ + include/linux/mmc/host.h | 1 + + 6 files changed, 46 insertions(+), 10 deletions(-) + mode change 100644 => 100755 drivers/acpi/resource.c + mode change 100644 => 100755 drivers/mmc/core/mmc.c + mode change 100644 => 100755 drivers/mmc/host/sdhci-acpi.c + mode change 100644 => 100755 drivers/mmc/host/sdhci.c + mode change 100644 => 100755 drivers/mmc/host/sdhci.h + mode change 100644 => 100755 include/linux/mmc/host.h + +diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c +old mode 100644 +new mode 100755 +index d85e010..e82b5a7 +--- a/drivers/acpi/resource.c ++++ b/drivers/acpi/resource.c +@@ -425,6 +425,11 @@ static void acpi_dev_get_irqresource(struct resource *res, u32 gsi, + triggering = trig; + polarity = pol; + } ++ if (gsi == 5) { ++ polarity = ACPI_ACTIVE_LOW; ++ pr_warning("ACPI: IRQ %d do not override to %s, %s\n", gsi, ++ t ? "level" : "edge", p ? "low" : "high"); ++ } + } + + res->flags = acpi_dev_irq_flags(triggering, polarity, shareable); +diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c +old mode 100644 +new mode 100755 +index bad5c1b..29bba1e +--- a/drivers/mmc/core/mmc.c ++++ b/drivers/mmc/core/mmc.c +@@ -1161,14 +1161,14 @@ static int mmc_select_hs400(struct mmc_card *card) + mmc_hostname(host), err); + return err; + } +- +- /* Set host controller to HS timing */ +- mmc_set_timing(card->host, MMC_TIMING_MMC_HS); +- +- /* Reduce frequency to HS frequency */ +- max_dtr = card->ext_csd.hs_max_dtr; +- mmc_set_clock(host, max_dtr); +- ++ /*In AMD Platform due to hardware ip issue this fails*/ ++ if (!host->ops->set_hs400_dll) { ++ /* Set host controller to HS timing */ ++ mmc_set_timing(card->host, MMC_TIMING_MMC_HS); ++ /* Reduce frequency to HS frequency */ ++ max_dtr = card->ext_csd.hs_max_dtr; ++ mmc_set_clock(host, max_dtr); ++ } + err = mmc_switch_status(card); + if (err) + goto out_err; +@@ -1204,7 +1204,8 @@ static int mmc_select_hs400(struct mmc_card *card) + err = mmc_switch_status(card); + if (err) + goto out_err; +- ++ if (host->ops->set_hs400_dll) ++ host->ops->set_hs400_dll(host); + return 0; + + out_err: +@@ -1227,6 +1228,7 @@ int mmc_hs400_to_hs200(struct mmc_card *card) + + /* Reduce frequency to HS */ + max_dtr = card->ext_csd.hs_max_dtr; ++ if (!host->ops->set_hs400_dll) + mmc_set_clock(host, max_dtr); + + /* Switch HS400 to HS DDR */ +@@ -1236,12 +1238,15 @@ int mmc_hs400_to_hs200(struct mmc_card *card) + true, false, true); + if (err) + goto out_err; +- ++ /*In AMD Platform due to hardware ip issue this fails*/ ++ if (!host->ops->set_hs400_dll) ++ { + mmc_set_timing(host, MMC_TIMING_MMC_DDR52); + + err = mmc_switch_status(card); + if (err) + goto out_err; ++ } + + /* Switch HS DDR to HS */ + err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, +diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c +old mode 100644 +new mode 100755 +index c2e7048..33592a6 +--- a/drivers/mmc/host/sdhci-acpi.c ++++ b/drivers/mmc/host/sdhci-acpi.c +@@ -411,6 +411,7 @@ static const struct sdhci_ops sdhci_acpi_ops_amd = { + .set_bus_width = sdhci_set_bus_width, + .reset = sdhci_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, ++ .set_hs400_dll = sdhci_acpi_amd_hs400_dll, + }; + + static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = { +@@ -441,6 +442,7 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = { + .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, + .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE | + SDHCI_QUIRK_32BIT_ADMA_SIZE, ++ .quirks2 = SDHCI_QUIRK2_BROKEN_TUNING_WA, + .probe_slot = sdhci_acpi_emmc_amd_probe_slot, + }; + +diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c +old mode 100644 +new mode 100755 +index d35deb7..8837d45 +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -1207,6 +1207,12 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) + flags |= SDHCI_CMD_DATA; + + sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); ++ ++ if (cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200 && (host->quirks2 & SDHCI_QUIRK2_BROKEN_TUNING_WA)) { ++ mdelay(10); ++ sdhci_writel(host, 0x8803040a, 0x8b8); ++ mdelay(10); ++ } + } + EXPORT_SYMBOL_GPL(sdhci_send_command); + +@@ -1873,6 +1879,14 @@ static void sdhci_hw_reset(struct mmc_host *mmc) + host->ops->hw_reset(host); + } + ++static void sdhci_set_hs400_dll(struct mmc_host *mmc) ++{ ++ struct sdhci_host *host = mmc_priv(mmc); ++ ++ if (host->ops && host->ops->set_hs400_dll) ++ host->ops->set_hs400_dll(host); ++} ++ + static void sdhci_enable_sdio_irq_nolock(struct sdhci_host *host, int enable) + { + if (!(host->flags & SDHCI_DEVICE_DEAD)) { +@@ -2356,6 +2370,7 @@ static const struct mmc_host_ops sdhci_ops = { + .get_cd = sdhci_get_cd, + .get_ro = sdhci_get_ro, + .hw_reset = sdhci_hw_reset, ++ .set_hs400_dll = sdhci_set_hs400_dll, + .enable_sdio_irq = sdhci_enable_sdio_irq, + .start_signal_voltage_switch = sdhci_start_signal_voltage_switch, + .prepare_hs400_tuning = sdhci_prepare_hs400_tuning, +@@ -3300,6 +3315,12 @@ void __sdhci_read_caps(struct sdhci_host *host, u16 *ver, u32 *caps, u32 *caps1) + host->caps1 &= ~upper_32_bits(dt_caps_mask); + host->caps1 |= upper_32_bits(dt_caps); + } ++ ++ if ((host->caps1 & SDHCI_SUPPORT_SDR104) && (host->caps1 & SDHCI_SUPPORT_DDR50) && ++ (host->quirks2 & SDHCI_QUIRK2_BROKEN_TUNING_WA)) ++ { ++ host->mmc->caps2 = MMC_CAP2_HS400_1_8V; ++ } + } + EXPORT_SYMBOL_GPL(__sdhci_read_caps); + +diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h +old mode 100644 +new mode 100755 +index 1d7d61e..b5fd294 +--- a/drivers/mmc/host/sdhci.h ++++ b/drivers/mmc/host/sdhci.h +@@ -438,6 +438,7 @@ struct sdhci_host { + /* Controller has CRC in 136 bit Command Response */ + #define SDHCI_QUIRK2_RSP_136_HAS_CRC (1<<16) + ++#define SDHCI_QUIRK2_BROKEN_TUNING_WA (1<<17) + int irq; /* Device IRQ */ + void __iomem *ioaddr; /* Mapped address */ + char *bounce_buffer; /* For packing SDMA reads/writes */ +@@ -584,6 +585,7 @@ struct sdhci_ops { + int (*platform_execute_tuning)(struct sdhci_host *host, u32 opcode); + void (*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs); + void (*hw_reset)(struct sdhci_host *host); ++ void (*set_hs400_dll)(struct sdhci_host *host); + void (*adma_workaround)(struct sdhci_host *host, u32 intmask); + void (*card_event)(struct sdhci_host *host); + void (*voltage_switch)(struct sdhci_host *host); +diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h +old mode 100644 +new mode 100755 +index 9a43763..b7d5611 +--- a/include/linux/mmc/host.h ++++ b/include/linux/mmc/host.h +@@ -152,6 +152,7 @@ struct mmc_host_ops { + unsigned int max_dtr, int host_drv, + int card_drv, int *drv_type); + void (*hw_reset)(struct mmc_host *host); ++ void (*set_hs400_dll)(struct mmc_host *host); + void (*card_event)(struct mmc_host *host); + + /* +-- +2.7.4 + |