diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71-e3000/0002-amd-xgbe-Read-and-save-the-port-property-registers-d.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71-e3000/0002-amd-xgbe-Read-and-save-the-port-property-registers-d.patch | 244 |
1 files changed, 244 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71-e3000/0002-amd-xgbe-Read-and-save-the-port-property-registers-d.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71-e3000/0002-amd-xgbe-Read-and-save-the-port-property-registers-d.patch new file mode 100644 index 00000000..010ddaf9 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71-e3000/0002-amd-xgbe-Read-and-save-the-port-property-registers-d.patch @@ -0,0 +1,244 @@ +From 2bae5fe2100e17ecf248820b543f8afaf2fe2de3 Mon Sep 17 00:00:00 2001 +From: Tom Lendacky <thomas.lendacky@amd.com> +Date: Wed, 23 May 2018 11:38:20 -0500 +Subject: [PATCH 02/95] amd-xgbe: Read and save the port property registers + during probe + +Read and save the port property registers once during the device probe +and then use the saved values as they are needed. + +Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> +Signed-off-by: David S. Miller <davem@davemloft.net> +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-pci.c | 34 +++++++++++---- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 68 ++++++++++++----------------- + drivers/net/ethernet/amd/xgbe/xgbe.h | 7 +++ + 3 linux-yocto-4.14.71 changed, 62 insertions(+), 47 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +index 7b63521..7b86240 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +@@ -335,12 +335,29 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + pdata->awcr = XGBE_DMA_PCI_AWCR; + pdata->awarcr = XGBE_DMA_PCI_AWARCR; + ++ /* Read the port property registers */ ++ pdata->pp0 = XP_IOREAD(pdata, XP_PROP_0); ++ pdata->pp1 = XP_IOREAD(pdata, XP_PROP_1); ++ pdata->pp2 = XP_IOREAD(pdata, XP_PROP_2); ++ pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3); ++ pdata->pp4 = XP_IOREAD(pdata, XP_PROP_4); ++ if (netif_msg_probe(pdata)) { ++ dev_dbg(dev, "port property 0 = %#010x\n", pdata->pp0); ++ dev_dbg(dev, "port property 1 = %#010x\n", pdata->pp1); ++ dev_dbg(dev, "port property 2 = %#010x\n", pdata->pp2); ++ dev_dbg(dev, "port property 3 = %#010x\n", pdata->pp3); ++ dev_dbg(dev, "port property 4 = %#010x\n", pdata->pp4); ++ } ++ + /* Set the maximum channels and queues */ +- reg = XP_IOREAD(pdata, XP_PROP_1); +- pdata->tx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_DMA); +- pdata->rx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_DMA); +- pdata->tx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_QUEUES); +- pdata->rx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_QUEUES); ++ pdata->tx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, ++ MAX_TX_DMA); ++ pdata->rx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, ++ MAX_RX_DMA); ++ pdata->tx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, ++ MAX_TX_QUEUES); ++ pdata->rx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, ++ MAX_RX_QUEUES); + if (netif_msg_probe(pdata)) { + dev_dbg(dev, "max tx/rx channel count = %u/%u\n", + pdata->tx_max_channel_count, +@@ -353,12 +370,13 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + xgbe_set_counts(pdata); + + /* Set the maximum fifo amounts */ +- reg = XP_IOREAD(pdata, XP_PROP_2); +- pdata->tx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, TX_FIFO_SIZE); ++ pdata->tx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2, ++ TX_FIFO_SIZE); + pdata->tx_max_fifo_size *= 16384; + pdata->tx_max_fifo_size = min(pdata->tx_max_fifo_size, + pdata->vdata->tx_max_fifo_size); +- pdata->rx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, RX_FIFO_SIZE); ++ pdata->rx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2, ++ RX_FIFO_SIZE); + pdata->rx_max_fifo_size *= 16384; + pdata->rx_max_fifo_size = min(pdata->rx_max_fifo_size, + pdata->vdata->rx_max_fifo_size); +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index aac8843..123ceb0 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -2421,22 +2421,21 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + static void xgbe_phy_sfp_gpio_setup(struct xgbe_prv_data *pdata) + { + struct xgbe_phy_data *phy_data = pdata->phy_data; +- unsigned int reg; +- +- reg = XP_IOREAD(pdata, XP_PROP_3); + + phy_data->sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 + +- XP_GET_BITS(reg, XP_PROP_3, GPIO_ADDR); ++ XP_GET_BITS(pdata->pp3, XP_PROP_3, ++ GPIO_ADDR); + +- phy_data->sfp_gpio_mask = XP_GET_BITS(reg, XP_PROP_3, GPIO_MASK); ++ phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3, ++ GPIO_MASK); + +- phy_data->sfp_gpio_rx_los = XP_GET_BITS(reg, XP_PROP_3, ++ phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3, + GPIO_RX_LOS); +- phy_data->sfp_gpio_tx_fault = XP_GET_BITS(reg, XP_PROP_3, ++ phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3, + GPIO_TX_FAULT); +- phy_data->sfp_gpio_mod_absent = XP_GET_BITS(reg, XP_PROP_3, ++ phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3, + GPIO_MOD_ABS); +- phy_data->sfp_gpio_rate_select = XP_GET_BITS(reg, XP_PROP_3, ++ phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3, + GPIO_RATE_SELECT); + + if (netif_msg_probe(pdata)) { +@@ -2458,18 +2457,17 @@ static void xgbe_phy_sfp_gpio_setup(struct xgbe_prv_data *pdata) + static void xgbe_phy_sfp_comm_setup(struct xgbe_prv_data *pdata) + { + struct xgbe_phy_data *phy_data = pdata->phy_data; +- unsigned int reg, mux_addr_hi, mux_addr_lo; ++ unsigned int mux_addr_hi, mux_addr_lo; + +- reg = XP_IOREAD(pdata, XP_PROP_4); +- +- mux_addr_hi = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_HI); +- mux_addr_lo = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_LO); ++ mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI); ++ mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO); + if (mux_addr_lo == XGBE_SFP_DIRECT) + return; + + phy_data->sfp_comm = XGBE_SFP_COMM_PCA9545; + phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo; +- phy_data->sfp_mux_channel = XP_GET_BITS(reg, XP_PROP_4, MUX_CHAN); ++ phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4, ++ MUX_CHAN); + + if (netif_msg_probe(pdata)) { + dev_dbg(pdata->dev, "SFP: mux_address=%#x\n", +@@ -2592,13 +2590,11 @@ static bool xgbe_phy_redrv_error(struct xgbe_phy_data *phy_data) + static int xgbe_phy_mdio_reset_setup(struct xgbe_prv_data *pdata) + { + struct xgbe_phy_data *phy_data = pdata->phy_data; +- unsigned int reg; + + if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) + return 0; + +- reg = XP_IOREAD(pdata, XP_PROP_3); +- phy_data->mdio_reset = XP_GET_BITS(reg, XP_PROP_3, MDIO_RESET); ++ phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET); + switch (phy_data->mdio_reset) { + case XGBE_MDIO_RESET_NONE: + case XGBE_MDIO_RESET_I2C_GPIO: +@@ -2612,12 +2608,12 @@ static int xgbe_phy_mdio_reset_setup(struct xgbe_prv_data *pdata) + + if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) { + phy_data->mdio_reset_addr = XGBE_GPIO_ADDRESS_PCA9555 + +- XP_GET_BITS(reg, XP_PROP_3, ++ XP_GET_BITS(pdata->pp3, XP_PROP_3, + MDIO_RESET_I2C_ADDR); +- phy_data->mdio_reset_gpio = XP_GET_BITS(reg, XP_PROP_3, ++ phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, + MDIO_RESET_I2C_GPIO); + } else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) { +- phy_data->mdio_reset_gpio = XP_GET_BITS(reg, XP_PROP_3, ++ phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, + MDIO_RESET_INT_GPIO); + } + +@@ -2707,12 +2703,9 @@ static bool xgbe_phy_conn_type_mismatch(struct xgbe_prv_data *pdata) + + static bool xgbe_phy_port_enabled(struct xgbe_prv_data *pdata) + { +- unsigned int reg; +- +- reg = XP_IOREAD(pdata, XP_PROP_0); +- if (!XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS)) ++ if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS)) + return false; +- if (!XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE)) ++ if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE)) + return false; + + return true; +@@ -2921,7 +2914,6 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + struct ethtool_link_ksettings *lks = &pdata->phy.lks; + struct xgbe_phy_data *phy_data; + struct mii_bus *mii; +- unsigned int reg; + int ret; + + /* Check if enabled */ +@@ -2940,12 +2932,11 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + return -ENOMEM; + pdata->phy_data = phy_data; + +- reg = XP_IOREAD(pdata, XP_PROP_0); +- phy_data->port_mode = XP_GET_BITS(reg, XP_PROP_0, PORT_MODE); +- phy_data->port_id = XP_GET_BITS(reg, XP_PROP_0, PORT_ID); +- phy_data->port_speeds = XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS); +- phy_data->conn_type = XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE); +- phy_data->mdio_addr = XP_GET_BITS(reg, XP_PROP_0, MDIO_ADDR); ++ phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE); ++ phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID); ++ phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS); ++ phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE); ++ phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR); + if (netif_msg_probe(pdata)) { + dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode); + dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id); +@@ -2954,12 +2945,11 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + dev_dbg(pdata->dev, "mdio addr=%u\n", phy_data->mdio_addr); + } + +- reg = XP_IOREAD(pdata, XP_PROP_4); +- phy_data->redrv = XP_GET_BITS(reg, XP_PROP_4, REDRV_PRESENT); +- phy_data->redrv_if = XP_GET_BITS(reg, XP_PROP_4, REDRV_IF); +- phy_data->redrv_addr = XP_GET_BITS(reg, XP_PROP_4, REDRV_ADDR); +- phy_data->redrv_lane = XP_GET_BITS(reg, XP_PROP_4, REDRV_LANE); +- phy_data->redrv_model = XP_GET_BITS(reg, XP_PROP_4, REDRV_MODEL); ++ phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT); ++ phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF); ++ phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR); ++ phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE); ++ phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL); + if (phy_data->redrv && netif_msg_probe(pdata)) { + dev_dbg(pdata->dev, "redrv present\n"); + dev_dbg(pdata->dev, "redrv i/f=%u\n", phy_data->redrv_if); +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h +index 95d4b56..54e43ad3 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h +@@ -1027,6 +1027,13 @@ struct xgbe_prv_data { + void __iomem *xprop_regs; /* XGBE property registers */ + void __iomem *xi2c_regs; /* XGBE I2C CSRs */ + ++ /* Port property registers */ ++ unsigned int pp0; ++ unsigned int pp1; ++ unsigned int pp2; ++ unsigned int pp3; ++ unsigned int pp4; ++ + /* Overall device lock */ + spinlock_t lock; + +-- +2.7.4 + |