diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.9.21/0073-x86-bugs-Expose-x86_spec_ctrl_base-directly.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.9.21/0073-x86-bugs-Expose-x86_spec_ctrl_base-directly.patch | 120 |
1 files changed, 0 insertions, 120 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.9.21/0073-x86-bugs-Expose-x86_spec_ctrl_base-directly.patch b/common/recipes-kernel/linux/linux-yocto-4.9.21/0073-x86-bugs-Expose-x86_spec_ctrl_base-directly.patch deleted file mode 100644 index 49224dbb..00000000 --- a/common/recipes-kernel/linux/linux-yocto-4.9.21/0073-x86-bugs-Expose-x86_spec_ctrl_base-directly.patch +++ /dev/null @@ -1,120 +0,0 @@ -From 22a75daea25a170892d8c6cbf0b740ef35219cc8 Mon Sep 17 00:00:00 2001 -From: Thomas Gleixner <tglx@linutronix.de> -Date: Sat, 12 May 2018 20:49:16 +0200 -Subject: [PATCH 73/93] x86/bugs: Expose x86_spec_ctrl_base directly - -commit fa8ac4988249c38476f6ad678a4848a736373403 upstream - -x86_spec_ctrl_base is the system wide default value for the SPEC_CTRL MSR. -x86_spec_ctrl_get_default() returns x86_spec_ctrl_base and was intended to -prevent modification to that variable. Though the variable is read only -after init and globaly visible already. - -Remove the function and export the variable instead. - -Signed-off-by: Thomas Gleixner <tglx@linutronix.de> -Reviewed-by: Borislav Petkov <bp@suse.de> -Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> -Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - arch/x86/include/asm/nospec-branch.h | 16 +++++----------- - arch/x86/include/asm/spec-ctrl.h | 3 --- - arch/x86/kernel/cpu/bugs.c | 11 +---------- - 3 files changed, 6 insertions(+), 24 deletions(-) - -diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h -index bc258e6..8d9deec 100644 ---- a/arch/x86/include/asm/nospec-branch.h -+++ b/arch/x86/include/asm/nospec-branch.h -@@ -217,16 +217,7 @@ enum spectre_v2_mitigation { - SPECTRE_V2_IBRS, - }; - --/* -- * The Intel specification for the SPEC_CTRL MSR requires that we -- * preserve any already set reserved bits at boot time (e.g. for -- * future additions that this kernel is not currently aware of). -- * We then set any additional mitigation bits that we want -- * ourselves and always use this as the base for SPEC_CTRL. -- * We also use this when handling guest entry/exit as below. -- */ - extern void x86_spec_ctrl_set(u64); --extern u64 x86_spec_ctrl_get_default(void); - - /* The Speculative Store Bypass disable variants */ - enum ssb_mitigation { -@@ -278,6 +269,9 @@ static inline void indirect_branch_prediction_barrier(void) - alternative_msr_write(MSR_IA32_PRED_CMD, val, X86_FEATURE_USE_IBPB); - } - -+/* The Intel SPEC CTRL MSR base value cache */ -+extern u64 x86_spec_ctrl_base; -+ - /* - * With retpoline, we must use IBRS to restrict branch prediction - * before calling into firmware. -@@ -286,7 +280,7 @@ static inline void indirect_branch_prediction_barrier(void) - */ - #define firmware_restrict_branch_speculation_start() \ - do { \ -- u64 val = x86_spec_ctrl_get_default() | SPEC_CTRL_IBRS; \ -+ u64 val = x86_spec_ctrl_base | SPEC_CTRL_IBRS; \ - \ - preempt_disable(); \ - alternative_msr_write(MSR_IA32_SPEC_CTRL, val, \ -@@ -295,7 +289,7 @@ do { \ - - #define firmware_restrict_branch_speculation_end() \ - do { \ -- u64 val = x86_spec_ctrl_get_default(); \ -+ u64 val = x86_spec_ctrl_base; \ - \ - alternative_msr_write(MSR_IA32_SPEC_CTRL, val, \ - X86_FEATURE_USE_IBRS_FW); \ -diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h -index 9cecbe5..763d497 100644 ---- a/arch/x86/include/asm/spec-ctrl.h -+++ b/arch/x86/include/asm/spec-ctrl.h -@@ -47,9 +47,6 @@ void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl) - extern u64 x86_amd_ls_cfg_base; - extern u64 x86_amd_ls_cfg_ssbd_mask; - --/* The Intel SPEC CTRL MSR base value cache */ --extern u64 x86_spec_ctrl_base; -- - static inline u64 ssbd_tif_to_spec_ctrl(u64 tifn) - { - BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT); -diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c -index 9203150..47b7f4f 100644 ---- a/arch/x86/kernel/cpu/bugs.c -+++ b/arch/x86/kernel/cpu/bugs.c -@@ -35,6 +35,7 @@ static void __init ssb_select_mitigation(void); - * writes to SPEC_CTRL contain whatever reserved bits have been set. - */ - u64 __ro_after_init x86_spec_ctrl_base; -+EXPORT_SYMBOL_GPL(x86_spec_ctrl_base); - - /* - * The vendor and possibly platform specific bits which can be modified in -@@ -140,16 +141,6 @@ void x86_spec_ctrl_set(u64 val) - } - EXPORT_SYMBOL_GPL(x86_spec_ctrl_set); - --u64 x86_spec_ctrl_get_default(void) --{ -- u64 msrval = x86_spec_ctrl_base; -- -- if (static_cpu_has(X86_FEATURE_SPEC_CTRL)) -- msrval |= ssbd_tif_to_spec_ctrl(current_thread_info()->flags); -- return msrval; --} --EXPORT_SYMBOL_GPL(x86_spec_ctrl_get_default); -- - void - x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest) - { --- -2.7.4 - |