diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.9.21/0071-x86-speculation-Rework-speculative_store_bypass_upda.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.9.21/0071-x86-speculation-Rework-speculative_store_bypass_upda.patch | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.9.21/0071-x86-speculation-Rework-speculative_store_bypass_upda.patch b/common/recipes-kernel/linux/linux-yocto-4.9.21/0071-x86-speculation-Rework-speculative_store_bypass_upda.patch new file mode 100644 index 00000000..daf64371 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.9.21/0071-x86-speculation-Rework-speculative_store_bypass_upda.patch @@ -0,0 +1,75 @@ +From 10bd199ba2af68b40deb854851b3db51bd97531a Mon Sep 17 00:00:00 2001 +From: Thomas Gleixner <tglx@linutronix.de> +Date: Thu, 10 May 2018 20:31:44 +0200 +Subject: [PATCH 71/93] x86/speculation: Rework + speculative_store_bypass_update() + +commit 0270be3e34efb05a88bc4c422572ece038ef3608 upstream + +The upcoming support for the virtual SPEC_CTRL MSR on AMD needs to reuse +speculative_store_bypass_update() to avoid code duplication. Add an +argument for supplying a thread info (TIF) value and create a wrapper +speculative_store_bypass_update_current() which is used at the existing +call site. + +Signed-off-by: Thomas Gleixner <tglx@linutronix.de> +Reviewed-by: Borislav Petkov <bp@suse.de> +Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> +Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + arch/x86/include/asm/spec-ctrl.h | 7 ++++++- + arch/x86/kernel/cpu/bugs.c | 2 +- + arch/x86/kernel/process.c | 4 ++-- + 3 files changed, 9 insertions(+), 4 deletions(-) + +diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h +index 6e28740..82b6c5a 100644 +--- a/arch/x86/include/asm/spec-ctrl.h ++++ b/arch/x86/include/asm/spec-ctrl.h +@@ -42,6 +42,11 @@ extern void speculative_store_bypass_ht_init(void); + static inline void speculative_store_bypass_ht_init(void) { } + #endif + +-extern void speculative_store_bypass_update(void); ++extern void speculative_store_bypass_update(unsigned long tif); ++ ++static inline void speculative_store_bypass_update_current(void) ++{ ++ speculative_store_bypass_update(current_thread_info()->flags); ++} + + #endif +diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c +index 97987b5..eddbdc8 100644 +--- a/arch/x86/kernel/cpu/bugs.c ++++ b/arch/x86/kernel/cpu/bugs.c +@@ -597,7 +597,7 @@ static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl) + * mitigation until it is next scheduled. + */ + if (task == current && update) +- speculative_store_bypass_update(); ++ speculative_store_bypass_update_current(); + + return 0; + } +diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c +index 6d9e1ee..00a9047 100644 +--- a/arch/x86/kernel/process.c ++++ b/arch/x86/kernel/process.c +@@ -338,10 +338,10 @@ static __always_inline void __speculative_store_bypass_update(unsigned long tifn + intel_set_ssb_state(tifn); + } + +-void speculative_store_bypass_update(void) ++void speculative_store_bypass_update(unsigned long tif) + { + preempt_disable(); +- __speculative_store_bypass_update(current_thread_info()->flags); ++ __speculative_store_bypass_update(tif); + preempt_enable(); + } + +-- +2.7.4 + |