diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.9.21/0036-x86-cpuid-Fix-up-virtual-IBRS-IBPB-STIBP-feature-bit.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.9.21/0036-x86-cpuid-Fix-up-virtual-IBRS-IBPB-STIBP-feature-bit.patch | 127 |
1 files changed, 0 insertions, 127 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.9.21/0036-x86-cpuid-Fix-up-virtual-IBRS-IBPB-STIBP-feature-bit.patch b/common/recipes-kernel/linux/linux-yocto-4.9.21/0036-x86-cpuid-Fix-up-virtual-IBRS-IBPB-STIBP-feature-bit.patch deleted file mode 100644 index 54039e5f..00000000 --- a/common/recipes-kernel/linux/linux-yocto-4.9.21/0036-x86-cpuid-Fix-up-virtual-IBRS-IBPB-STIBP-feature-bit.patch +++ /dev/null @@ -1,127 +0,0 @@ -From 230aaaad00ca4c1e2c350ce30188d03417a170fe Mon Sep 17 00:00:00 2001 -From: David Woodhouse <dwmw@amazon.co.uk> -Date: Tue, 30 Jan 2018 14:30:23 +0000 -Subject: [PATCH 36/42] x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature - bits on Intel - -(cherry picked from commit 7fcae1118f5fd44a862aa5c3525248e35ee67c3b) - -Despite the fact that all the other code there seems to be doing it, just -using set_cpu_cap() in early_intel_init() doesn't actually work. - -For CPUs with PKU support, setup_pku() calls get_cpu_cap() after -c->c_init() has set those feature bits. That resets those bits back to what -was queried from the hardware. - -Turning the bits off for bad microcode is easy to fix. That can just use -setup_clear_cpu_cap() to force them off for all CPUs. - -I was less keen on forcing the feature bits *on* that way, just in case -of inconsistencies. I appreciate that the kernel is going to get this -utterly wrong if CPU features are not consistent, because it has already -applied alternatives by the time secondary CPUs are brought up. - -But at least if setup_force_cpu_cap() isn't being used, we might have a -chance of *detecting* the lack of the corresponding bit and either -panicking or refusing to bring the offending CPU online. - -So ensure that the appropriate feature bits are set within get_cpu_cap() -regardless of how many extra times it's called. - -Fixes: 2961298e ("x86/cpufeatures: Clean up Spectre v2 related CPUID flags") -Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> -Signed-off-by: Thomas Gleixner <tglx@linutronix.de> -Cc: karahmed@amazon.de -Cc: peterz@infradead.org -Cc: bp@alien8.de -Link: https://lkml.kernel.org/r/1517322623-15261-1-git-send-email-dwmw@amazon.co.uk -Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - arch/x86/kernel/cpu/common.c | 21 +++++++++++++++++++++ - arch/x86/kernel/cpu/intel.c | 27 ++++++++------------------- - 2 files changed, 29 insertions(+), 19 deletions(-) - -diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c -index cfa026f..60e537d 100644 ---- a/arch/x86/kernel/cpu/common.c -+++ b/arch/x86/kernel/cpu/common.c -@@ -718,6 +718,26 @@ static void apply_forced_caps(struct cpuinfo_x86 *c) - } - } - -+static void init_speculation_control(struct cpuinfo_x86 *c) -+{ -+ /* -+ * The Intel SPEC_CTRL CPUID bit implies IBRS and IBPB support, -+ * and they also have a different bit for STIBP support. Also, -+ * a hypervisor might have set the individual AMD bits even on -+ * Intel CPUs, for finer-grained selection of what's available. -+ * -+ * We use the AMD bits in 0x8000_0008 EBX as the generic hardware -+ * features, which are visible in /proc/cpuinfo and used by the -+ * kernel. So set those accordingly from the Intel bits. -+ */ -+ if (cpu_has(c, X86_FEATURE_SPEC_CTRL)) { -+ set_cpu_cap(c, X86_FEATURE_IBRS); -+ set_cpu_cap(c, X86_FEATURE_IBPB); -+ } -+ if (cpu_has(c, X86_FEATURE_INTEL_STIBP)) -+ set_cpu_cap(c, X86_FEATURE_STIBP); -+} -+ - void get_cpu_cap(struct cpuinfo_x86 *c) - { - u32 eax, ebx, ecx, edx; -@@ -812,6 +832,7 @@ void get_cpu_cap(struct cpuinfo_x86 *c) - c->x86_capability[CPUID_8000_000A_EDX] = cpuid_edx(0x8000000a); - - init_scattered_cpuid_features(c); -+ init_speculation_control(c); - } - - static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) -diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c -index 2e257f8..4097b43 100644 ---- a/arch/x86/kernel/cpu/intel.c -+++ b/arch/x86/kernel/cpu/intel.c -@@ -140,28 +140,17 @@ static void early_init_intel(struct cpuinfo_x86 *c) - rdmsr(MSR_IA32_UCODE_REV, lower_word, c->microcode); - } - -- /* -- * The Intel SPEC_CTRL CPUID bit implies IBRS and IBPB support, -- * and they also have a different bit for STIBP support. Also, -- * a hypervisor might have set the individual AMD bits even on -- * Intel CPUs, for finer-grained selection of what's available. -- */ -- if (cpu_has(c, X86_FEATURE_SPEC_CTRL)) { -- set_cpu_cap(c, X86_FEATURE_IBRS); -- set_cpu_cap(c, X86_FEATURE_IBPB); -- } -- if (cpu_has(c, X86_FEATURE_INTEL_STIBP)) -- set_cpu_cap(c, X86_FEATURE_STIBP); -- - /* Now if any of them are set, check the blacklist and clear the lot */ -- if ((cpu_has(c, X86_FEATURE_IBRS) || cpu_has(c, X86_FEATURE_IBPB) || -+ if ((cpu_has(c, X86_FEATURE_SPEC_CTRL) || -+ cpu_has(c, X86_FEATURE_INTEL_STIBP) || -+ cpu_has(c, X86_FEATURE_IBRS) || cpu_has(c, X86_FEATURE_IBPB) || - cpu_has(c, X86_FEATURE_STIBP)) && bad_spectre_microcode(c)) { - pr_warn("Intel Spectre v2 broken microcode detected; disabling Speculation Control\n"); -- clear_cpu_cap(c, X86_FEATURE_IBRS); -- clear_cpu_cap(c, X86_FEATURE_IBPB); -- clear_cpu_cap(c, X86_FEATURE_STIBP); -- clear_cpu_cap(c, X86_FEATURE_SPEC_CTRL); -- clear_cpu_cap(c, X86_FEATURE_INTEL_STIBP); -+ setup_clear_cpu_cap(X86_FEATURE_IBRS); -+ setup_clear_cpu_cap(X86_FEATURE_IBPB); -+ setup_clear_cpu_cap(X86_FEATURE_STIBP); -+ setup_clear_cpu_cap(X86_FEATURE_SPEC_CTRL); -+ setup_clear_cpu_cap(X86_FEATURE_INTEL_STIBP); - } - - /* --- -2.7.4 - |