diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.9.21/0031-x86-bugs-Whitelist-allowed-SPEC_CTRL-MSR-values.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.9.21/0031-x86-bugs-Whitelist-allowed-SPEC_CTRL-MSR-values.patch | 70 |
1 files changed, 0 insertions, 70 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.9.21/0031-x86-bugs-Whitelist-allowed-SPEC_CTRL-MSR-values.patch b/common/recipes-kernel/linux/linux-yocto-4.9.21/0031-x86-bugs-Whitelist-allowed-SPEC_CTRL-MSR-values.patch deleted file mode 100644 index ff00b421..00000000 --- a/common/recipes-kernel/linux/linux-yocto-4.9.21/0031-x86-bugs-Whitelist-allowed-SPEC_CTRL-MSR-values.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 9b78406df0ca3d21903d71f41b64a793dad76cfc Mon Sep 17 00:00:00 2001 -From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> -Date: Wed, 25 Apr 2018 22:04:23 -0400 -Subject: [PATCH 31/93] x86/bugs: Whitelist allowed SPEC_CTRL MSR values - -commit 1115a859f33276fe8afb31c60cf9d8e657872558 upstream - -Intel and AMD SPEC_CTRL (0x48) MSR semantics may differ in the -future (or in fact use different MSRs for the same functionality). - -As such a run-time mechanism is required to whitelist the appropriate MSR -values. - -[ tglx: Made the variable __ro_after_init ] - -Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> -Signed-off-by: Thomas Gleixner <tglx@linutronix.de> -Reviewed-by: Ingo Molnar <mingo@kernel.org> -Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - arch/x86/kernel/cpu/bugs.c | 11 +++++++++-- - 1 file changed, 9 insertions(+), 2 deletions(-) - -diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c -index 7dd16f4..b92c469 100644 ---- a/arch/x86/kernel/cpu/bugs.c -+++ b/arch/x86/kernel/cpu/bugs.c -@@ -34,6 +34,12 @@ static void __init ssb_select_mitigation(void); - */ - static u64 __ro_after_init x86_spec_ctrl_base; - -+/* -+ * The vendor and possibly platform specific bits which can be modified in -+ * x86_spec_ctrl_base. -+ */ -+static u64 __ro_after_init x86_spec_ctrl_mask = ~SPEC_CTRL_IBRS; -+ - void __init check_bugs(void) - { - identify_boot_cpu(); -@@ -116,7 +122,7 @@ static enum spectre_v2_mitigation spectre_v2_enabled = SPECTRE_V2_NONE; - - void x86_spec_ctrl_set(u64 val) - { -- if (val & ~(SPEC_CTRL_IBRS | SPEC_CTRL_RDS)) -+ if (val & x86_spec_ctrl_mask) - WARN_ONCE(1, "SPEC_CTRL MSR value 0x%16llx is unknown.\n", val); - else - wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base | val); -@@ -458,6 +464,7 @@ static enum ssb_mitigation_cmd __init __ssb_select_mitigation(void) - switch (boot_cpu_data.x86_vendor) { - case X86_VENDOR_INTEL: - x86_spec_ctrl_base |= SPEC_CTRL_RDS; -+ x86_spec_ctrl_mask &= ~SPEC_CTRL_RDS; - x86_spec_ctrl_set(SPEC_CTRL_RDS); - break; - case X86_VENDOR_AMD: -@@ -481,7 +488,7 @@ static void ssb_select_mitigation() - void x86_spec_ctrl_setup_ap(void) - { - if (boot_cpu_has(X86_FEATURE_IBRS)) -- x86_spec_ctrl_set(x86_spec_ctrl_base & (SPEC_CTRL_IBRS | SPEC_CTRL_RDS)); -+ x86_spec_ctrl_set(x86_spec_ctrl_base & ~x86_spec_ctrl_mask); - } - - #ifdef CONFIG_SYSFS --- -2.7.4 - |