diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1767-drm-amdgpu-use-pcie_bandwidth_available-rather-than-.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1767-drm-amdgpu-use-pcie_bandwidth_available-rather-than-.patch | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1767-drm-amdgpu-use-pcie_bandwidth_available-rather-than-.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1767-drm-amdgpu-use-pcie_bandwidth_available-rather-than-.patch new file mode 100644 index 00000000..77b47c11 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1767-drm-amdgpu-use-pcie_bandwidth_available-rather-than-.patch @@ -0,0 +1,81 @@ +From db8cfeb0e0107f8a17bd08b0e0d70fb796dd0c43 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Thu, 11 Apr 2019 08:58:22 -0500 +Subject: [PATCH 1767/2940] drm/amdgpu: use pcie_bandwidth_available rather + than open coding it +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It does the same thing we were doing already. I though it needed +work for gen3/4 speeds, but that seems to be covered already. + +Reviewed-by: Evan Quan <evan.quan@amd.com> +Acked-by: Michel Dänzer <michel.daenzer@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 41 ++-------------------- + 1 file changed, 2 insertions(+), 39 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 452f1f64c2a6..4882b86b33f2 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -3697,43 +3697,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, + return r; + } + +-static void amdgpu_device_get_min_pci_speed_width(struct amdgpu_device *adev, +- enum pci_bus_speed *speed, +- enum pcie_link_width *width) +-{ +- struct pci_dev *pdev = adev->pdev; +- enum pci_bus_speed cur_speed; +- enum pcie_link_width cur_width; +- u32 ret = 1; +- +- *speed = PCI_SPEED_UNKNOWN; +- *width = PCIE_LNK_WIDTH_UNKNOWN; +- +- while (pdev) { +- cur_speed = pcie_get_speed_cap(pdev); +- cur_width = pcie_get_width_cap(pdev); +- ret = pcie_bandwidth_available(adev->pdev, NULL, +- NULL, &cur_width); +- if (!ret) +- cur_width = PCIE_LNK_WIDTH_RESRV; +- +- if (cur_speed != PCI_SPEED_UNKNOWN) { +- if (*speed == PCI_SPEED_UNKNOWN) +- *speed = cur_speed; +- else if (cur_speed < *speed) +- *speed = cur_speed; +- } +- +- if (cur_width != PCIE_LNK_WIDTH_UNKNOWN) { +- if (*width == PCIE_LNK_WIDTH_UNKNOWN) +- *width = cur_width; +- else if (cur_width < *width) +- *width = cur_width; +- } +- pdev = pci_upstream_bridge(pdev); +- } +-} +- + /** + * amdgpu_device_get_pcie_info - fence pcie info about the PCIE slot + * +@@ -3767,8 +3730,8 @@ static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev) + if (adev->pm.pcie_gen_mask && adev->pm.pcie_mlw_mask) + return; + +- amdgpu_device_get_min_pci_speed_width(adev, &platform_speed_cap, +- &platform_link_width); ++ pcie_bandwidth_available(adev->pdev, NULL, ++ &platform_speed_cap, &platform_link_width); + + if (adev->pm.pcie_gen_mask == 0) { + /* asic caps */ +-- +2.17.1 + |