diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1756-drm-amd-display-disable-link-before-changing-link-se.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1756-drm-amd-display-disable-link-before-changing-link-se.patch | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1756-drm-amd-display-disable-link-before-changing-link-se.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1756-drm-amd-display-disable-link-before-changing-link-se.patch new file mode 100644 index 00000000..2ebce48f --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1756-drm-amd-display-disable-link-before-changing-link-se.patch @@ -0,0 +1,52 @@ +From faaf5b45d10adad18b1d8be4b4a9ceb44bfbdf40 Mon Sep 17 00:00:00 2001 +From: Anthony Koo <Anthony.Koo@amd.com> +Date: Mon, 25 Mar 2019 14:30:12 -0400 +Subject: [PATCH 1756/2940] drm/amd/display: disable link before changing link + settings + +[Why] +If link is already enabled at a different rate (for example 5.4 Gbps) +then calling VBIOS command table to switch to a new rate +(for example 2.7 Gbps) will not take effect. +This can lead to link training failure to occur. + +[How] +If the requested link rate is different than the current link rate, +the link must be disabled in order to re-enable at the new +link rate. + +In today's logic it is currently only impacting eDP since DP +connection types will always disable the link during display +detection, when initial link verification occurs. + +Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> +Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +Acked-by: Tony Cheng <Tony.Cheng@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc_link.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +index 8504396be362..fa7ba2d3f9a2 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +@@ -1396,6 +1396,15 @@ static enum dc_status enable_link_dp( + /* get link settings for video mode timing */ + decide_link_settings(stream, &link_settings); + ++ /* If link settings are different than current and link already enabled ++ * then need to disable before programming to new rate. ++ */ ++ if (link->link_status.link_active && ++ (link->cur_link_settings.lane_count != link_settings.lane_count || ++ link->cur_link_settings.link_rate != link_settings.link_rate)) { ++ dp_disable_link_phy(link, pipe_ctx->stream->signal); ++ } ++ + pipe_ctx->stream_res.pix_clk_params.requested_sym_clk = + link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ; + state->clk_mgr->funcs->update_clocks(state->clk_mgr, state, false); +-- +2.17.1 + |