diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1748-drm-amd-display-Use-plane-color_space-for-dpp-if-spe.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1748-drm-amd-display-Use-plane-color_space-for-dpp-if-spe.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1748-drm-amd-display-Use-plane-color_space-for-dpp-if-spe.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1748-drm-amd-display-Use-plane-color_space-for-dpp-if-spe.patch new file mode 100644 index 00000000..03540d69 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1748-drm-amd-display-Use-plane-color_space-for-dpp-if-spe.patch @@ -0,0 +1,68 @@ +From 8dd3fb0d14ac951ae2d2ec775d78bc66d1721590 Mon Sep 17 00:00:00 2001 +From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> +Date: Thu, 14 Mar 2019 13:46:44 -0400 +Subject: [PATCH 1748/2940] drm/amd/display: Use plane->color_space for dpp if + specified + +[Why] +The input color space for the plane was previously ignored even if it +was set. + +If a limited range YUV format was given to DC then the +wrong color transformation matrix was being used since DC assumed that +it was full range instead. + +[How] +Respect the given color_space format for the plane if it isn't +COLOR_SPACE_UNKNOWN. Otherwise, use the implicit default since DM +didn't specify. + +Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> +Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> +Acked-by: Aric Cyr <Aric.Cyr@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 6 +++++- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 +- + 2 files changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c +index f91e4b49d211..6f4b24756323 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c +@@ -385,6 +385,10 @@ void dpp1_cnv_setup ( + default: + break; + } ++ ++ /* Set default color space based on format if none is given. */ ++ color_space = input_color_space ? input_color_space : color_space; ++ + REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, + CNVC_SURFACE_PIXEL_FORMAT, pixel_format); + REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); +@@ -396,7 +400,7 @@ void dpp1_cnv_setup ( + for (i = 0; i < 12; i++) + tbl_entry.regval[i] = input_csc_color_matrix.matrix[i]; + +- tbl_entry.color_space = input_color_space; ++ tbl_entry.color_space = color_space; + + if (color_space >= COLOR_SPACE_YCBCR601) + select = INPUT_CSC_SELECT_ICSC; +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +index 439012f6ac35..443804e85ae5 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +@@ -1948,7 +1948,7 @@ static void update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state) + plane_state->format, + EXPANSION_MODE_ZERO, + plane_state->input_csc_color_matrix, +- COLOR_SPACE_YCBCR601_LIMITED); ++ plane_state->color_space); + + //set scale and bias registers + build_prescale_params(&bns_params, plane_state); +-- +2.17.1 + |