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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1725-drm-amdgpu-Allow-switching-to-CUSTOM-profile-on-Vega.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.19.8/1725-drm-amdgpu-Allow-switching-to-CUSTOM-profile-on-Vega.patch90
1 files changed, 90 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1725-drm-amdgpu-Allow-switching-to-CUSTOM-profile-on-Vega.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1725-drm-amdgpu-Allow-switching-to-CUSTOM-profile-on-Vega.patch
new file mode 100644
index 00000000..6ec6822d
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1725-drm-amdgpu-Allow-switching-to-CUSTOM-profile-on-Vega.patch
@@ -0,0 +1,90 @@
+From 0f1a40952ea64763e894c933478b83eb6abd8f48 Mon Sep 17 00:00:00 2001
+From: Kent Russell <kent.russell@amd.com>
+Date: Mon, 1 Apr 2019 07:19:06 -0400
+Subject: [PATCH 1725/2940] drm/amdgpu: Allow switching to CUSTOM profile on
+ Vega20
+
+Vega20 stores a CUSTOM profile on the GPU, but it may not be valid. Add
+a bool to vega20_hwmgr to determine whether or not a valid CUSTOM
+profile has been set, and use that to check when a user requests
+switching to the CUSTOM profile without passing in any arguments. Then
+if the CUSTOM profile has been set already, we can switch to it without
+providing the parameters again
+
+Change-Id: If3e55ec8e5aa6921d4f3f1098f5778036cd69990
+Signed-off-by: Kent Russell <kent.russell@amd.com>
+Reviewed-by: Evan Quan <evan.quan@amd.com>
+---
+ .../gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 16 +++++++++++++++-
+ .../gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h | 2 ++
+ 2 files changed, 17 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+index 70dc641bf94d..39a547084e90 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+@@ -434,6 +434,7 @@ static int vega20_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
+ hwmgr->platform_descriptor.clockStep.memoryClock = 500;
+
+ data->total_active_cus = adev->gfx.cu_info.number;
++ data->is_custom_profile_set = false;
+
+ return 0;
+ }
+@@ -3843,7 +3844,11 @@ static int vega20_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, ui
+ }
+
+ if (power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
+- if (size < 10)
++ struct vega20_hwmgr *data =
++ (struct vega20_hwmgr *)(hwmgr->backend);
++ if (size == 0 && !data->is_custom_profile_set)
++ return -EINVAL;
++ if (size < 10 && size != 0)
+ return -EINVAL;
+
+ result = vega20_get_activity_monitor_coeff(hwmgr,
+@@ -3853,6 +3858,13 @@ static int vega20_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, ui
+ "[SetPowerProfile] Failed to get activity monitor!",
+ return result);
+
++ /* If size==0, then we want to apply the already-configured
++ * CUSTOM profile again. Just apply it, since we checked its
++ * validity above
++ */
++ if (size == 0)
++ goto out;
++
+ switch (input[0]) {
+ case 0: /* Gfxclk */
+ activity_monitor.Gfx_FPS = input[1];
+@@ -3903,11 +3915,13 @@ static int vega20_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, ui
+ result = vega20_set_activity_monitor_coeff(hwmgr,
+ (uint8_t *)(&activity_monitor),
+ WORKLOAD_PPLIB_CUSTOM_BIT);
++ data->is_custom_profile_set = true;
+ PP_ASSERT_WITH_CODE(!result,
+ "[SetPowerProfile] Failed to set activity monitor!",
+ return result);
+ }
+
++out:
+ /* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */
+ workload_type =
+ conv_power_profile_to_pplib_workload(power_profile_mode);
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
+index ac2a3118a0ae..2c3125f82b24 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
+@@ -531,6 +531,8 @@ struct vega20_hwmgr {
+ bool pcie_parameters_override;
+ uint32_t pcie_gen_level1;
+ uint32_t pcie_width_level1;
++
++ bool is_custom_profile_set;
+ };
+
+ #define VEGA20_DPM2_NEAR_TDP_DEC 10
+--
+2.17.1
+