diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1667-drm-amdgpu-use-the-new-VM-backend-for-PDEs.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1667-drm-amdgpu-use-the-new-VM-backend-for-PDEs.patch | 141 |
1 files changed, 141 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1667-drm-amdgpu-use-the-new-VM-backend-for-PDEs.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1667-drm-amdgpu-use-the-new-VM-backend-for-PDEs.patch new file mode 100644 index 00000000..93f4da66 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1667-drm-amdgpu-use-the-new-VM-backend-for-PDEs.patch @@ -0,0 +1,141 @@ +From 73ab8b0ef7ebde8d7a1e2112d47539a138854165 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Mon, 18 Mar 2019 14:26:24 +0100 +Subject: [PATCH 1667/2940] drm/amdgpu: use the new VM backend for PDEs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +And remove the existing code when it is unused. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Chunming Zhou <david1.zhou@amd.com> +Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 74 +++++--------------------- + 1 file changed, 14 insertions(+), 60 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index fb3efd94bfd7..b139c348e952 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -1295,10 +1295,10 @@ static void amdgpu_vm_update_func(struct amdgpu_vm_update_params *params, + * + * Makes sure the requested entry in parent is up to date. + */ +-static void amdgpu_vm_update_pde(struct amdgpu_vm_update_params *params, +- struct amdgpu_vm *vm, +- struct amdgpu_vm_pt *parent, +- struct amdgpu_vm_pt *entry) ++static int amdgpu_vm_update_pde(struct amdgpu_vm_update_params *params, ++ struct amdgpu_vm *vm, ++ struct amdgpu_vm_pt *parent, ++ struct amdgpu_vm_pt *entry) + { + struct amdgpu_bo *bo = parent->base.bo, *pbo; + uint64_t pde, pt, flags; +@@ -1310,7 +1310,7 @@ static void amdgpu_vm_update_pde(struct amdgpu_vm_update_params *params, + level += params->adev->vm_manager.root_level; + amdgpu_gmc_get_pde_for_bo(entry->base.bo, level, &pt, &flags); + pde = (entry - parent->entries) * 8; +- amdgpu_vm_update_func(params, bo, pde, pt, 1, 0, flags); ++ return vm->update_funcs->update(params, bo, pde, pt, 1, 0, flags); + } + + /* +@@ -1347,33 +1347,18 @@ int amdgpu_vm_update_directories(struct amdgpu_device *adev, + struct amdgpu_vm *vm) + { + struct amdgpu_vm_update_params params; +- struct amdgpu_job *job; +- unsigned ndw = 0; +- int r = 0; ++ int r; + + if (list_empty(&vm->relocated)) + return 0; + +-restart: + memset(¶ms, 0, sizeof(params)); + params.adev = adev; ++ params.vm = vm; + +- if (vm->use_cpu_for_update) { +- r = amdgpu_bo_sync_wait(vm->root.base.bo, +- AMDGPU_FENCE_OWNER_VM, true); +- if (unlikely(r)) +- return r; +- +- params.func = amdgpu_vm_cpu_set_ptes; +- } else { +- ndw = 512; +- r = amdgpu_job_alloc_with_ib(adev, ndw * 4, &job); +- if (r) +- return r; +- +- params.ib = &job->ibs[0]; +- params.func = amdgpu_vm_do_set_ptes; +- } ++ r = vm->update_funcs->prepare(¶ms, AMDGPU_FENCE_OWNER_VM, NULL); ++ if (r) ++ return r; + + while (!list_empty(&vm->relocated)) { + struct amdgpu_vm_pt *pt, *entry; +@@ -1386,49 +1371,18 @@ int amdgpu_vm_update_directories(struct amdgpu_device *adev, + if (!pt) + continue; + +- amdgpu_vm_update_pde(¶ms, vm, pt, entry); +- +- if (!vm->use_cpu_for_update && +- (ndw - params.ib->length_dw) < 32) +- break; +- } +- +- if (vm->use_cpu_for_update) { +- /* Flush HDP */ +- mb(); +- amdgpu_asic_flush_hdp(adev, NULL); +- } else if (params.ib->length_dw == 0) { +- amdgpu_job_free(job); +- } else { +- struct amdgpu_bo *root = vm->root.base.bo; +- struct amdgpu_ring *ring; +- struct dma_fence *fence; +- +- ring = container_of(vm->entity.rq->sched, struct amdgpu_ring, +- sched); +- +- amdgpu_ring_pad_ib(ring, params.ib); +- amdgpu_sync_resv(adev, &job->sync, root->tbo.resv, +- AMDGPU_FENCE_OWNER_VM, false); +- WARN_ON(params.ib->length_dw > ndw); +- r = amdgpu_job_submit(job, &vm->entity, AMDGPU_FENCE_OWNER_VM, +- &fence); ++ r = amdgpu_vm_update_pde(¶ms, vm, pt, entry); + if (r) + goto error; +- +- amdgpu_bo_fence(root, fence, true); +- dma_fence_put(vm->last_update); +- vm->last_update = fence; + } + +- if (!list_empty(&vm->relocated)) +- goto restart; +- ++ r = vm->update_funcs->commit(¶ms, &vm->last_update); ++ if (r) ++ goto error; + return 0; + + error: + amdgpu_vm_invalidate_pds(adev, vm); +- amdgpu_job_free(job); + return r; + } + +-- +2.17.1 + |