diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1664-drm-amdgpu-move-and-rename-amdgpu_pte_update_params.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1664-drm-amdgpu-move-and-rename-amdgpu_pte_update_params.patch | 269 |
1 files changed, 269 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1664-drm-amdgpu-move-and-rename-amdgpu_pte_update_params.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1664-drm-amdgpu-move-and-rename-amdgpu_pte_update_params.patch new file mode 100644 index 00000000..12560fd5 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1664-drm-amdgpu-move-and-rename-amdgpu_pte_update_params.patch @@ -0,0 +1,269 @@ +From 35a5b0feee98f559fd787bd0bf14f28a27b50f22 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Mon, 18 Mar 2019 12:27:35 +0100 +Subject: [PATCH 1664/2940] drm/amdgpu: move and rename + amdgpu_pte_update_params +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Move the update parameter into the VM header and rename them. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Chunming Zhou <david1.zhou@amd.com> +Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 75 ++++++-------------------- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 45 ++++++++++++++++ + 2 files changed, 60 insertions(+), 60 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index 020e98225126..7f4c197bee8f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -66,51 +66,6 @@ INTERVAL_TREE_DEFINE(struct amdgpu_bo_va_mapping, rb, uint64_t, __subtree_last, + #undef START + #undef LAST + +-/** +- * struct amdgpu_pte_update_params - Local structure +- * +- * Encapsulate some VM table update parameters to reduce +- * the number of function parameters +- * +- */ +-struct amdgpu_pte_update_params { +- +- /** +- * @adev: amdgpu device we do this update for +- */ +- struct amdgpu_device *adev; +- +- /** +- * @vm: optional amdgpu_vm we do this update for +- */ +- struct amdgpu_vm *vm; +- +- /** +- * @pages_addr: +- * +- * DMA addresses to use for mapping +- */ +- dma_addr_t *pages_addr; +- +- /** +- * @src: address where to copy page table entries from +- */ +- uint64_t src; +- +- /** +- * @ib: indirect buffer to fill with commands +- */ +- struct amdgpu_ib *ib; +- +- /** +- * @func: Function which actually does the update +- */ +- void (*func)(struct amdgpu_pte_update_params *params, +- struct amdgpu_bo *bo, uint64_t pe, +- uint64_t addr, unsigned count, uint32_t incr, +- uint64_t flags); +-}; +- + /** + * struct amdgpu_prt_cb - Helper to disable partial resident texture feature from a fence callback + */ +@@ -1194,7 +1149,7 @@ struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm, + /** + * amdgpu_vm_do_set_ptes - helper to call the right asic function + * +- * @params: see amdgpu_pte_update_params definition ++ * @params: see amdgpu_vm_update_params definition + * @bo: PD/PT to update + * @pe: addr of the page entry + * @addr: dst addr to write into pe +@@ -1205,7 +1160,7 @@ struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm, + * Traces the parameters and calls the right asic functions + * to setup the page table using the DMA. + */ +-static void amdgpu_vm_do_set_ptes(struct amdgpu_pte_update_params *params, ++static void amdgpu_vm_do_set_ptes(struct amdgpu_vm_update_params *params, + struct amdgpu_bo *bo, + uint64_t pe, uint64_t addr, + unsigned count, uint32_t incr, +@@ -1227,7 +1182,7 @@ static void amdgpu_vm_do_set_ptes(struct amdgpu_pte_update_params *params, + /** + * amdgpu_vm_do_copy_ptes - copy the PTEs from the GART + * +- * @params: see amdgpu_pte_update_params definition ++ * @params: see amdgpu_vm_update_params definition + * @bo: PD/PT to update + * @pe: addr of the page entry + * @addr: dst addr to write into pe +@@ -1237,7 +1192,7 @@ static void amdgpu_vm_do_set_ptes(struct amdgpu_pte_update_params *params, + * + * Traces the parameters and calls the DMA function to copy the PTEs. + */ +-static void amdgpu_vm_do_copy_ptes(struct amdgpu_pte_update_params *params, ++static void amdgpu_vm_do_copy_ptes(struct amdgpu_vm_update_params *params, + struct amdgpu_bo *bo, + uint64_t pe, uint64_t addr, + unsigned count, uint32_t incr, +@@ -1281,7 +1236,7 @@ static uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr) + /** + * amdgpu_vm_cpu_set_ptes - helper to update page tables via CPU + * +- * @params: see amdgpu_pte_update_params definition ++ * @params: see amdgpu_vm_update_params definition + * @bo: PD/PT to update + * @pe: kmap addr of the page entry + * @addr: dst addr to write into pe +@@ -1291,7 +1246,7 @@ static uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr) + * + * Write count number of PT/PD entries directly. + */ +-static void amdgpu_vm_cpu_set_ptes(struct amdgpu_pte_update_params *params, ++static void amdgpu_vm_cpu_set_ptes(struct amdgpu_vm_update_params *params, + struct amdgpu_bo *bo, + uint64_t pe, uint64_t addr, + unsigned count, uint32_t incr, +@@ -1319,7 +1274,7 @@ static void amdgpu_vm_cpu_set_ptes(struct amdgpu_pte_update_params *params, + * + * Calls the update function for both the given BO as well as its shadow. + */ +-static void amdgpu_vm_update_func(struct amdgpu_pte_update_params *params, ++static void amdgpu_vm_update_func(struct amdgpu_vm_update_params *params, + struct amdgpu_bo *bo, + uint64_t pe, uint64_t addr, + unsigned count, uint32_t incr, +@@ -1340,7 +1295,7 @@ static void amdgpu_vm_update_func(struct amdgpu_pte_update_params *params, + * + * Makes sure the requested entry in parent is up to date. + */ +-static void amdgpu_vm_update_pde(struct amdgpu_pte_update_params *params, ++static void amdgpu_vm_update_pde(struct amdgpu_vm_update_params *params, + struct amdgpu_vm *vm, + struct amdgpu_vm_pt *parent, + struct amdgpu_vm_pt *entry) +@@ -1391,7 +1346,7 @@ static void amdgpu_vm_invalidate_pds(struct amdgpu_device *adev, + int amdgpu_vm_update_directories(struct amdgpu_device *adev, + struct amdgpu_vm *vm) + { +- struct amdgpu_pte_update_params params; ++ struct amdgpu_vm_update_params params; + struct amdgpu_job *job; + unsigned ndw = 0; + int r = 0; +@@ -1482,7 +1437,7 @@ int amdgpu_vm_update_directories(struct amdgpu_device *adev, + * + * Make sure to set the right flags for the PTEs at the desired level. + */ +-static void amdgpu_vm_update_flags(struct amdgpu_pte_update_params *params, ++static void amdgpu_vm_update_flags(struct amdgpu_vm_update_params *params, + struct amdgpu_bo *bo, unsigned level, + uint64_t pe, uint64_t addr, + unsigned count, uint32_t incr, +@@ -1507,7 +1462,7 @@ static void amdgpu_vm_update_flags(struct amdgpu_pte_update_params *params, + /** + * amdgpu_vm_fragment - get fragment for PTEs + * +- * @params: see amdgpu_pte_update_params definition ++ * @params: see amdgpu_vm_update_params definition + * @start: first PTE to handle + * @end: last PTE to handle + * @flags: hw mapping flags +@@ -1516,7 +1471,7 @@ static void amdgpu_vm_update_flags(struct amdgpu_pte_update_params *params, + * + * Returns the first possible fragment for the start and end address. + */ +-static void amdgpu_vm_fragment(struct amdgpu_pte_update_params *params, ++static void amdgpu_vm_fragment(struct amdgpu_vm_update_params *params, + uint64_t start, uint64_t end, uint64_t flags, + unsigned int *frag, uint64_t *frag_end) + { +@@ -1560,7 +1515,7 @@ static void amdgpu_vm_fragment(struct amdgpu_pte_update_params *params, + /** + * amdgpu_vm_update_ptes - make sure that page tables are valid + * +- * @params: see amdgpu_pte_update_params definition ++ * @params: see amdgpu_vm_update_params definition + * @start: start of GPU address range + * @end: end of GPU address range + * @dst: destination address to map to, the next dst inside the function +@@ -1571,7 +1526,7 @@ static void amdgpu_vm_fragment(struct amdgpu_pte_update_params *params, + * Returns: + * 0 for success, -EINVAL for failure. + */ +-static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params, ++static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params, + uint64_t start, uint64_t end, + uint64_t dst, uint64_t flags) + { +@@ -1714,7 +1669,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, + void *owner = AMDGPU_FENCE_OWNER_VM; + unsigned nptes, ncmds, ndw; + struct amdgpu_job *job; +- struct amdgpu_pte_update_params params; ++ struct amdgpu_vm_update_params params; + struct dma_fence *f = NULL; + int r; + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +index a18a9f8c0d40..d53e9edaa2b9 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +@@ -172,6 +172,51 @@ struct amdgpu_task_info { + pid_t tgid; + }; + ++/** ++ * struct amdgpu_vm_update_params ++ * ++ * Encapsulate some VM table update parameters to reduce ++ * the number of function parameters ++ * ++ */ ++struct amdgpu_vm_update_params { ++ ++ /** ++ * @adev: amdgpu device we do this update for ++ */ ++ struct amdgpu_device *adev; ++ ++ /** ++ * @vm: optional amdgpu_vm we do this update for ++ */ ++ struct amdgpu_vm *vm; ++ ++ /** ++ * @pages_addr: ++ * ++ * DMA addresses to use for mapping ++ */ ++ dma_addr_t *pages_addr; ++ ++ /** ++ * @src: address where to copy page table entries from ++ */ ++ uint64_t src; ++ ++ /** ++ * @ib: indirect buffer to fill with commands ++ */ ++ struct amdgpu_ib *ib; ++ ++ /** ++ * @func: Function which actually does the update ++ */ ++ void (*func)(struct amdgpu_vm_update_params *params, ++ struct amdgpu_bo *bo, uint64_t pe, ++ uint64_t addr, unsigned count, uint32_t incr, ++ uint64_t flags); ++}; ++ + struct amdgpu_vm { + /* tree of virtual addresses mapped */ + struct rb_root_cached va; +-- +2.17.1 + |