diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1485-drm-amd-powerplay-set-dpm-table-of-vclk-dclk-eclk-fo.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1485-drm-amd-powerplay-set-dpm-table-of-vclk-dclk-eclk-fo.patch | 116 |
1 files changed, 116 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1485-drm-amd-powerplay-set-dpm-table-of-vclk-dclk-eclk-fo.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1485-drm-amd-powerplay-set-dpm-table-of-vclk-dclk-eclk-fo.patch new file mode 100644 index 00000000..c8d29f8d --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1485-drm-amd-powerplay-set-dpm-table-of-vclk-dclk-eclk-fo.patch @@ -0,0 +1,116 @@ +From 26e1fc3396dc1b5717f79f9bc05dd7da5aad4905 Mon Sep 17 00:00:00 2001 +From: Likun Gao <Likun.Gao@amd.com> +Date: Mon, 28 Jan 2019 12:19:57 +0800 +Subject: [PATCH 1485/2940] drm/amd/powerplay: set dpm table of vclk/dclk/eclk + for smu11 (v2) + +Set default dpm table fo vclk, dclk and eclk. +Open clk adjust rules for vclk, dclk. + +v2: Open clk adjust rules for eclk. + +Signed-off-by: Likun Gao <Likun.Gao@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 18 ++++++------------ + 1 file changed, 6 insertions(+), 12 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c +index 300462aff83a..6aa94ee81b59 100644 +--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c ++++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c +@@ -542,11 +542,10 @@ static int vega20_set_default_dpm_table(struct smu_context *smu) + } + vega20_init_single_dpm_state(&(single_dpm_table->dpm_state)); + +-#if 0 + /* eclk */ + single_dpm_table = &(dpm_table->eclk_table); + +- if (feature->fea_enabled[FEATURE_DPM_VCE_BIT]) { ++ if (smu_feature_is_enabled(smu, FEATURE_DPM_VCE_BIT)) { + ret = vega20_set_single_dpm_table(smu, single_dpm_table, PPCLK_ECLK); + if (ret) { + pr_err("[SetupDefaultDpmTable] failed to get eclk dpm levels!"); +@@ -554,14 +553,14 @@ static int vega20_set_default_dpm_table(struct smu_context *smu) + } + } else { + single_dpm_table->count = 1; +- single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.eclock / 100; ++ single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.eclk / 100; + } + vega20_init_single_dpm_state(&(single_dpm_table->dpm_state)); + + /* vclk */ + single_dpm_table = &(dpm_table->vclk_table); + +- if (feature->fea_enabled[FEATURE_DPM_UVD_BIT]) { ++ if (smu_feature_is_enabled(smu, FEATURE_DPM_UVD_BIT)) { + ret = vega20_set_single_dpm_table(smu, single_dpm_table, PPCLK_VCLK); + if (ret) { + pr_err("[SetupDefaultDpmTable] failed to get vclk dpm levels!"); +@@ -569,14 +568,14 @@ static int vega20_set_default_dpm_table(struct smu_context *smu) + } + } else { + single_dpm_table->count = 1; +- single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.vclock / 100; ++ single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.vclk / 100; + } + vega20_init_single_dpm_state(&(single_dpm_table->dpm_state)); + + /* dclk */ + single_dpm_table = &(dpm_table->dclk_table); + +- if (feature->fea_enabled[FEATURE_DPM_UVD_BIT]) { ++ if (smu_feature_is_enabled(smu, FEATURE_DPM_UVD_BIT)) { + ret = vega20_set_single_dpm_table(smu, single_dpm_table, PPCLK_DCLK); + if (ret) { + pr_err("[SetupDefaultDpmTable] failed to get dclk dpm levels!"); +@@ -584,10 +583,9 @@ static int vega20_set_default_dpm_table(struct smu_context *smu) + } + } else { + single_dpm_table->count = 1; +- single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dclock / 100; ++ single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dclk / 100; + } + vega20_init_single_dpm_state(&(single_dpm_table->dpm_state)); +-#endif + + /* dcefclk */ + single_dpm_table = &(dpm_table->dcef_table); +@@ -1483,7 +1481,6 @@ static int vega20_apply_clocks_adjust_rules(struct smu_context *smu) + if (smu->display_config->nb_pstate_switch_disable) + dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value; + +-#if 0 + /* vclk */ + dpm_table = &(dpm_ctx->vclk_table); + dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value; +@@ -1517,7 +1514,6 @@ static int vega20_apply_clocks_adjust_rules(struct smu_context *smu) + dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value; + dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value; + } +-#endif + + /* socclk */ + dpm_table = &(dpm_ctx->soc_table); +@@ -1536,7 +1532,6 @@ static int vega20_apply_clocks_adjust_rules(struct smu_context *smu) + dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value; + } + +-#if 0 + /* eclk */ + dpm_table = &(dpm_ctx->eclk_table); + dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value; +@@ -1553,7 +1548,6 @@ static int vega20_apply_clocks_adjust_rules(struct smu_context *smu) + dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value; + dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value; + } +-#endif + return 0; + } + +-- +2.17.1 + |