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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1455-drm-amd-powerplay-add-sys-interface-for-pcie-for-smu.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.19.8/1455-drm-amd-powerplay-add-sys-interface-for-pcie-for-smu.patch71
1 files changed, 71 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1455-drm-amd-powerplay-add-sys-interface-for-pcie-for-smu.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1455-drm-amd-powerplay-add-sys-interface-for-pcie-for-smu.patch
new file mode 100644
index 00000000..de4550f0
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1455-drm-amd-powerplay-add-sys-interface-for-pcie-for-smu.patch
@@ -0,0 +1,71 @@
+From 5e8f0dd2fc677d9e80b85192f376e4665bbf4955 Mon Sep 17 00:00:00 2001
+From: Likun Gao <Likun.Gao@amd.com>
+Date: Fri, 18 Jan 2019 12:53:27 +0800
+Subject: [PATCH 1455/2940] drm/amd/powerplay: add sys interface for pcie for
+ smu
+
+Add sys interface for set/get PCIE info for SMU.
+The related operate will do nothing as vega20 do not support it now.
+
+Signed-off-by: Likun Gao <Likun.Gao@amd.com>
+Reviewed-by: Huang Rui <ray.huang@amd.com>
+Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 8 ++++++--
+ drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 6 ++++++
+ 2 files changed, 12 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+index 77d946f8fca5..52cb63030b9a 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+@@ -1004,7 +1004,9 @@ static ssize_t amdgpu_get_pp_dpm_pcie(struct device *dev,
+ struct drm_device *ddev = dev_get_drvdata(dev);
+ struct amdgpu_device *adev = ddev->dev_private;
+
+- if (adev->powerplay.pp_funcs->print_clock_levels)
++ if (is_support_sw_smu(adev))
++ return smu_print_clk_levels(&adev->smu, PP_PCIE, buf);
++ else if (adev->powerplay.pp_funcs->print_clock_levels)
+ return amdgpu_dpm_print_clock_levels(adev, PP_PCIE, buf);
+ else
+ return snprintf(buf, PAGE_SIZE, "\n");
+@@ -1024,7 +1026,9 @@ static ssize_t amdgpu_set_pp_dpm_pcie(struct device *dev,
+ if (ret)
+ return ret;
+
+- if (adev->powerplay.pp_funcs->force_clock_level)
++ if (is_support_sw_smu(adev))
++ ret = smu_force_clk_levels(&adev->smu, PP_PCIE, mask);
++ else if (adev->powerplay.pp_funcs->force_clock_level)
+ ret = amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask);
+
+ if (ret)
+diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
+index 911296d1f7cc..904b8fc93a20 100644
+--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
++++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
+@@ -775,6 +775,9 @@ static int vega20_print_clk_levels(struct smu_context *smu,
+ ? "*" : "");
+ break;
+
++ case PP_PCIE:
++ break;
++
+ case OD_SCLK:
+ if (od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMIN].feature_id &&
+ od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMAX].feature_id) {
+@@ -1016,6 +1019,9 @@ static int vega20_force_clk_levels(struct smu_context *smu,
+
+ break;
+
++ case PP_PCIE:
++ break;
++
+ default:
+ break;
+ }
+--
+2.17.1
+