diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1451-drm-amd-powerplay-add-vega20_notify_smc_display_conf.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1451-drm-amd-powerplay-add-vega20_notify_smc_display_conf.patch | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1451-drm-amd-powerplay-add-vega20_notify_smc_display_conf.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1451-drm-amd-powerplay-add-vega20_notify_smc_display_conf.patch new file mode 100644 index 00000000..73452b02 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1451-drm-amd-powerplay-add-vega20_notify_smc_display_conf.patch @@ -0,0 +1,75 @@ +From 28156584df1e52fca5391d5d9fd25cd0fc02af5e Mon Sep 17 00:00:00 2001 +From: Chengming Gui <Jack.Gui@amd.com> +Date: Fri, 18 Jan 2019 10:01:10 +0800 +Subject: [PATCH 1451/2940] drm/amd/powerplay: add + vega20_notify_smc_display_config functions for SMU11 + +add vega20_notify_smc_display_config functions to +support sys interface for SMU11. + +Signed-off-by: Chengming Gui <Jack.Gui@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 45 ++++++++++++++++++++++ + 1 file changed, 45 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c +index 7f351c80f04e..0440e5c7a66e 100644 +--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c ++++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c +@@ -1569,6 +1569,51 @@ static int vega20_apply_clocks_adjust_rules(struct smu_context *smu) + return 0; + } + ++static int ++vega20_notify_smc_dispaly_config(struct smu_context *smu) ++{ ++ struct vega20_dpm_table *dpm_table = smu->smu_dpm.dpm_context; ++ struct vega20_single_dpm_table *memtable = &dpm_table->mem_table; ++ struct smu_clocks min_clocks = {0}; ++ struct pp_display_clock_request clock_req; ++ int ret = 0; ++ ++ min_clocks.dcef_clock = smu->display_config->min_dcef_set_clk; ++ min_clocks.dcef_clock_in_sr = smu->display_config->min_dcef_deep_sleep_set_clk; ++ min_clocks.memory_clock = smu->display_config->min_mem_set_clock; ++ ++ if (smu_feature_is_supported(smu, FEATURE_DPM_DCEFCLK_BIT)) { ++ clock_req.clock_type = amd_pp_dcef_clock; ++ clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; ++ if (!smu->funcs->display_clock_voltage_request(smu, &clock_req)) { ++ if (smu_feature_is_supported(smu, FEATURE_DS_DCEFCLK_BIT)) { ++ ret = smu_send_smc_msg_with_param(smu, ++ SMU_MSG_SetMinDeepSleepDcefclk, ++ min_clocks.dcef_clock_in_sr/100); ++ if (ret) { ++ pr_err("Attempt to set divider for DCEFCLK Failed!"); ++ return ret; ++ } ++ } ++ } else { ++ pr_info("Attempt to set Hard Min for DCEFCLK Failed!"); ++ } ++ } ++ ++ if (smu_feature_is_enabled(smu, FEATURE_DPM_UCLK_BIT)) { ++ memtable->dpm_state.hard_min_level = min_clocks.memory_clock/100; ++ ret = smu_send_smc_msg_with_param(smu, ++ SMU_MSG_SetHardMinByFreq, ++ (PPCLK_UCLK << 16) | memtable->dpm_state.hard_min_level); ++ if (ret) { ++ pr_err("[%s] Set hard min uclk failed!", __func__); ++ return ret; ++ } ++ } ++ ++ return 0; ++} ++ + static const struct pptable_funcs vega20_ppt_funcs = { + .alloc_dpm_context = vega20_allocate_dpm_context, + .store_powerplay_table = vega20_store_powerplay_table, +-- +2.17.1 + |